cpu32

verilog 32bit cpu experiment
git clone http://frotz.net/git/cpu32.git
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Makefile (613B)

      1 # Copyright 2012, Brian Swetland.  Use at your own risk.
      2 
      3 SRC := verilog/testbench.v
      4 SRC += verilog/dualsyncram.v verilog/control.v
      5 SRC += verilog/cpu32.v verilog/alu.v verilog/regfile.v
      6 SRC += verilog/uart.v
      7 SRC += verilog/library.v
      8 
      9 all: a32 testbench
     10 
     11 TESTS := $(wildcard tests/*.s)
     12 RESULTS := $(TESTS:.s=.s.pass)
     13 
     14 testbench: $(SRC) 
     15 	iverilog -Wall -o testbench $(SRC)
     16 
     17 a32: a32.c
     18 	gcc -g -Wall -o a32 a32.c
     19 
     20 clean::
     21 	rm -f testbench testbench.vcd a32 rom.txt
     22 	rm -rf tests/*.out tests/*.txt tests/*.trace tests/*.pass
     23 
     24 tests/%.s.pass: tests/%.s
     25 	@./runtest.sh $<
     26 	@touch $@
     27 
     28 tests:: a32 testbench $(RESULTS)