dcpu-16-suggestions.txt (932B)
1 Some comments on the DCPU-16 architecture - suggestions / feedback 2 3 - Providing BEQ val, reladdr / BNE val, reladdr would probably be more 4 emulation-friendly than the IFE/IFN/IFG/IFB -- adjusting the PC is 5 simpler/cheaper than maintaining a "skip next" flag, or decoding 6 the length of the next instruction when processing the branch 7 8 - Suggest replacing the 0x1f-0x3f encodings for the "a" operand with 9 alternatives to the literal/immediates. Good candidates might be 10 special registers (interrupt control, system, etc) or IO registers. 11 12 - Suggest making the immediate value in the [imm + reg] operand form 13 signed, to allow easy access to locals from a frame pointer. This 14 also enables some other common data access patterns. 15 16 - Consider providing interrupts for cycle count and "wall clock" 17 timers (if not general IO interrupts), to allow for preemptive 18 multitasking (and/or just debugging/watchdog processes).