m3dev

cortex m3 debug tools -- superceded by mdebug
git clone http://frotz.net/git/m3dev.git
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gpio-v1.c (2195B)

      1 /* gpio.c
      2  *
      3  * Copyright 2011 Brian Swetland <swetland@frotz.net>
      4  * 
      5  * Licensed under the Apache License, Version 2.0 (the "License");
      6  * you may not use this file except in compliance with the License.
      7  * You may obtain a copy of the License at
      8  *
      9  *     http://www.apache.org/licenses/LICENSE-2.0
     10  *
     11  * Unless required by applicable law or agreed to in writing, software
     12  * distributed under the License is distributed on an "AS IS" BASIS,
     13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     14  * See the License for the specific language governing permissions and
     15  * limitations under the License.
     16  */
     17 
     18 #include <fw/lib.h>
     19 #include <fw/io.h>
     20 
     21 #include <arch/hardware.h>
     22 
     23 void gpio_cfg_dir(unsigned n, unsigned cfg) {
     24 	unsigned addr = GPIODIR(0) | (n & 0x30000);
     25 	n &= 0xFFF;
     26 	if (cfg & GPIO_CFG_OUT) {
     27 		writel(readl(addr) | n, addr);
     28 	} else {
     29 		writel(readl(addr) & (~n), addr);
     30 	}
     31 }
     32 
     33 void gpio_cfg_irq(unsigned n, unsigned cfg) {
     34 	unsigned off = (n & 0x30000);
     35 	unsigned addr;
     36 	n &= 0xFFF;
     37 
     38 	addr = GPIOBOTHEDGES(0) + off;
     39 	if (cfg & GPIO_CFG_BOTH) {
     40 		writel(readl(addr) | n, addr);
     41 	} else {
     42 		writel(readl(addr) & (~n), addr);
     43 		addr = GPIOPOLARITY(0) + off;
     44 		if (cfg & GPIO_CFG_NEGATIVE) {
     45 			writel(readl(addr) & (~n), addr);
     46 		} else {
     47 			writel(readl(addr) | n, addr);
     48 		}
     49 	}
     50 
     51 	addr = GPIOLEVEL(0) + off;
     52 	if (cfg & GPIO_CFG_EDGE) {
     53 		writel(readl(addr) & (~n), addr);
     54 	} else {
     55 		writel(readl(addr) | n, addr);
     56 	}
     57 }
     58 
     59 int gpio_irq_check(unsigned n) {
     60 	unsigned off = (n & 0x30000);
     61 	return (readl(GPIORAWISR(0) + off) & (n & 0xFFF)) != 0;
     62 }
     63 
     64 void gpio_irq_clear(unsigned n) {
     65 	unsigned off = (n & 0x30000);
     66 	writel(n & 0xFFF, GPIOICR(0) + off);
     67 }
     68 
     69 void gpio_set(unsigned n) {
     70 	unsigned addr = GPIOBASE(0) | (n & 0x30000) | ((n & 0xFFF) << 2);
     71 	writel(0xFFFFFFFF, addr);
     72 }
     73 
     74 void gpio_clr(unsigned n) {
     75 	unsigned addr = GPIOBASE(0) | (n & 0x30000) | ((n & 0xFFF) << 2);
     76 	writel(0, addr);
     77 }
     78 
     79 void gpio_wr(unsigned n, unsigned val) {
     80 	unsigned addr = GPIOBASE(0) | (n & 0x30000) | ((n & 0xFFF) << 2);
     81 	writel(val ? 0xFFFFFFFF : 0, addr);
     82 }
     83 
     84 int gpio_rd(unsigned n) {
     85 	unsigned addr = GPIODATA(0) | (n & 0x30000);
     86 	n &= 0xFFF;
     87 	return (readl(addr) & n) != 0;
     88 }