m3dev

cortex m3 debug tools -- superceded by mdebug
git clone http://frotz.net/git/m3dev.git
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gpio-v2.c (2090B)


      1 /* gpio.c
      2  *
      3  * Copyright 2011 Brian Swetland <swetland@frotz.net>
      4  * 
      5  * Licensed under the Apache License, Version 2.0 (the "License");
      6  * you may not use this file except in compliance with the License.
      7  * You may obtain a copy of the License at
      8  *
      9  *     http://www.apache.org/licenses/LICENSE-2.0
     10  *
     11  * Unless required by applicable law or agreed to in writing, software
     12  * distributed under the License is distributed on an "AS IS" BASIS,
     13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     14  * See the License for the specific language governing permissions and
     15  * limitations under the License.
     16  */
     17 
     18 #include <fw/lib.h>
     19 #include <fw/io.h>
     20 
     21 #include <arch/hardware.h>
     22 
     23 void gpio_cfg_dir(unsigned n, unsigned cfg) {
     24 	unsigned addr = GPIO_DIR(GPIO_PORT(n));
     25 	unsigned val = readl(addr);
     26 
     27 	if (cfg & GPIO_CFG_OUT)
     28 		val |= 1 << GPIO_NUM(n);
     29 	else
     30 		val &= ~(1 << GPIO_NUM(n));
     31 
     32 	writel(val, addr);
     33 }
     34 
     35 void gpio_cfg_irq(unsigned n, unsigned cfg) {
     36 	unsigned irq;
     37 	irq = (cfg >> 8) & 0x7;
     38 
     39 	if (cfg & GPIO_CFG_EDGE)
     40 		clr_set_reg(GPIO_ISEL, 1 << irq, 0);
     41 	else
     42 		clr_set_reg(GPIO_ISEL, 0, 1 << irq);
     43 
     44 	if (cfg & GPIO_CFG_POSITIVE)
     45 		writel(1 << irq, GPIO_SIENR);
     46 	else
     47 		writel(1 << irq, GPIO_CIENR);
     48 
     49 
     50 	if (cfg & GPIO_CFG_NEGATIVE)
     51 		writel(1 << irq, GPIO_SIENF);
     52 	else
     53 		writel(1 << irq, GPIO_CIENF);
     54 
     55 	writel(GPIO_PORT(n) * 24 + SCB_PINTSEL_INTPIN(GPIO_NUM(n)),
     56 	       SCB_PINTSEL(irq));
     57 }
     58 
     59 int gpio_irq_check(unsigned n) {
     60 	asm("b .");
     61 	return 0;
     62 #if 0
     63 	unsigned off = (n & 0x30000);
     64 	return (readl(GPIORAWISR(0) + off) & (n & 0xFFF)) != 0;
     65 #endif
     66 }
     67 
     68 void gpio_irq_clear(unsigned n) {
     69 	asm("b .");
     70 #if 0
     71 	unsigned off = (n & 0x30000);
     72 	writel(n & 0xFFF, GPIOICR(0) + off);
     73 #endif
     74 }
     75 
     76 void gpio_set(unsigned n) {
     77 	writel(1 << GPIO_NUM(n), GPIO_SET(GPIO_PORT(n)));
     78 }
     79 
     80 void gpio_clr(unsigned n) {
     81 	writel(1 << GPIO_NUM(n), GPIO_CLR(GPIO_PORT(n)));
     82 }
     83 
     84 void gpio_wr(unsigned n, unsigned val) {
     85 	/* TODO: use the word set regs */
     86 	if (val)
     87 		gpio_set(n);
     88 	else
     89 		gpio_clr(n);
     90 }
     91 
     92 int gpio_rd(unsigned n) {
     93 	return !!(readl(GPIO_W(GPIO_PORT(n) * 32 + GPIO_NUM(n))));
     94 }