ide-int.h (5456B)
1 /* $Id: //depot/blt/srv/ide/ide-int.h#5 $ 2 ** 3 ** Copyright 1999 Sidney Cammeresi 4 ** All rights reserved. 5 ** 6 ** Redistribution and use in source and binary forms, with or without 7 ** modification, are permitted provided that the following conditions 8 ** are met: 9 ** 1. Redistributions of source code must retain the above copyright 10 ** notice, this list of conditions, and the following disclaimer. 11 ** 2. Redistributions in binary form must reproduce the above copyright 12 ** notice, this list of conditions, and the following disclaimer in the 13 ** documentation and/or other materials provided with the distribution. 14 ** 3. The name of the author may not be used to endorse or promote products 15 ** derived from this software without specific prior written permission. 16 ** 17 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef IDE_INT_H 30 #define IDE_INT_H 31 32 #include <blt/disk.h> 33 34 #define IDE_PRI_BASE 0x1f0 35 #define IDE_SEC_BASE 0x170 36 #define IDE_DIGITAL_OUTPUT 0x3f6 37 #define IDE_DRIVE_ADDR 0x3f7 38 39 #define IDE_REG_OFF_DATA 0 /* R/W, 16 bits */ 40 #define IDE_REG_OFF_ERROR 1 /* R */ 41 #define IDE_REG_OFF_PRECOMP 1 /* W */ 42 #define IDE_REG_OFF_SECCNT 2 /* R/W */ 43 #define IDE_REG_OFF_SECNUM 3 /* R/W */ 44 #define IDE_REG_OFF_CYLLSB 4 /* R/W */ 45 #define IDE_REG_OFF_CYLMSB 5 /* R/W */ 46 #define IDE_REG_OFF_DH 6 /* R/W */ 47 #define IDE_REG_OFF_STATUS 7 /* R */ 48 #define IDE_REG_OFF_COMMAND 7 /* W */ 49 50 #define IDE_REG_DATA (base + IDE_REG_OFF_DATA) 51 #define IDE_REG_ERROR (base + IDE_REG_OFF_ERROR) 52 #define IDE_REG_PRECOMP (base + IDE_REG_OFF_PRECOMP) 53 #define IDE_REG_SECCNT (base + IDE_REG_OFF_SECCNT) 54 #define IDE_REG_SECNUM (base + IDE_REG_OFF_SECNUM) 55 #define IDE_REG_CYLLSB (base + IDE_REG_OFF_CYLLSB) 56 #define IDE_REG_CYLMSB (base + IDE_REG_OFF_CYLMSB) 57 #define IDE_REG_DH (base + IDE_REG_OFF_DH) 58 #define IDE_REG_STATUS (base + IDE_REG_OFF_STATUS) 59 #define IDE_REG_COMMAND (base + IDE_REG_OFF_COMMAND) 60 61 #define IDE_SEL_DH(bus, device, head) \ 62 outb (0x1010000 | (device << 4) | head, IDE_REG_DH) 63 64 #define IDE_WAIT_0(reg, bit) \ 65 while (inb (IDE_REG_##reg) & (1 << bit)) ; 66 #define IDE_WAIT_1(reg, bit) \ 67 while (!(inb (IDE_REG_##reg) & (1 << bit))) ; 68 69 /* XXX - hack */ 70 #define IDE_WAITFAIL_1(reg, bit) \ 71 { \ 72 int __spin__ = 0; \ 73 while (!(inb (IDE_REG_##reg) & (1 << bit)) && (__spin__ < 10000)) \ 74 __spin__++; \ 75 if (__spin__ == 10000) \ 76 fail = 1; \ 77 } 78 79 #define IDE_OP_RECALIBRATE 0x10 80 #define IDE_OP_READ 0x20 81 #define IDE_OP_WRITE 0x30 82 #define IDE_OP_IDENTIFY_DEVICE 0xec 83 84 #define IDE_IDENTIFY_DATA_SIZE 256 85 86 typedef struct 87 { 88 unsigned short config; /* obsolete stuff */ 89 unsigned short cyls; /* logical cylinders */ 90 unsigned short _reserved_2; 91 unsigned short heads; /* logical heads */ 92 unsigned short _vendor_4; 93 unsigned short _vendor_5; 94 unsigned short sectors; /* logical sectors */ 95 unsigned short _vendor_7; 96 unsigned short _vendor_8; 97 unsigned short _vendor_9; 98 char serial[20]; /* serial number */ 99 unsigned short _vendor_20; 100 unsigned short _vendor_21; 101 unsigned short vend_bytes_long; /* no. vendor bytes on long cmd */ 102 char firmware[8]; 103 char model[40]; 104 unsigned short mult_support; /* vendor stuff and multiple cmds */ 105 unsigned short _reserved_48; 106 unsigned short capabilities; 107 unsigned short _reserved_50; 108 unsigned short pio; 109 unsigned short dma; 110 unsigned short _reserved_53; 111 unsigned short curr_cyls; /* current logical cylinders */ 112 unsigned short curr_heads; /* current logical heads */ 113 unsigned short curr_sectors; /* current logical sectors */ 114 unsigned int capacity; /* capacity in sectors */ 115 unsigned short _pad[256-59]; /* don't need this stuff for now */ 116 } ide_hw_id_t; 117 118 typedef struct 119 { 120 const ide_hw_id_t *hwdev; 121 int iobase; 122 disk_t *disk; 123 int (*read) (int bus, int device, void *buf, int block); 124 int (*write) (int bus, int device, const void *buf, int block); 125 } ide_dev_t; 126 127 extern ide_dev_t **ide_dev; 128 extern int total_busses; 129 130 void ide_btochs (int block, ide_dev_t *dev, int *cyl, int *head, int *sect); 131 132 int ide_probe_devices (void); 133 134 int ide_disk_read (int bus, int device, void *data, int block); 135 int ide_disk_write (int bus, int device, const void *data, int block); 136 137 static inline int ide_base (int bus) 138 { 139 if (bus == 0) 140 return IDE_PRI_BASE; 141 else if (bus == 1) 142 return IDE_SEC_BASE; 143 else 144 return -1; 145 } 146 147 #endif 148