swd-io.pio (1264B)
1 .program swdio 2 .side_set 1 opt 3 4 public out_negedge: 5 set pindirs, 1 side 0x0 ; Init OE clock 0 6 pull ; Pull number of bits to shift -1 from tx fifo and put into output shift register 7 mov x, osr ; mov bits to shift -1 from output shift register into x 8 pull ; Pull data to shift out 9 out_negedge_bitloop: 10 out pins, 1 side 0x0 ; clock data out on falling edge 11 jmp x-- out_negedge_bitloop side 0x1 ; data is present for posedge 12 set pins, 0 side 0x0 ; Drive data low 13 push ; Push to rx fifo just so processor knows when done 14 jmp out_negedge ; Wait for next transaction 15 16 public in_posedge: 17 set pindirs, 0 side 0x0 ; INIT IE clock 0 18 pull ; Pull number of bits to shift -1 from tx fifo and put into output shift register 19 mov x, osr ; mov bits to shift -1 from output shift register into x into x 20 in_posedge_bitloop: 21 in pins, 1 side 0x1 ; Generate posedge and read data 22 jmp x-- in_posedge_bitloop side 0x0 ; 23 push ; Push to rx fifo when done 24 jmp in_posedge ; Jump back to start