riscv

an RV32I simulator and related experiments
git clone http://frotz.net/git/riscv.git
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rvsim.h (687B)


      1 // Copyright 2019, Brian Swetland <swetland@frotz.net>
      2 // Licensed under the Apache License, Version 2.0.
      3 
      4 #pragma once
      5 
      6 typedef struct rvstate rvstate_t;
      7 
      8 // initialize simulator
      9 int rvsim_init(rvstate_t** s, void* ctx);
     10 
     11 // start simulator running at pc
     12 int rvsim_exec(rvstate_t* s, uint32_t pc);
     13 
     14 // obtain a pointer for direct memory access
     15 void* rvsim_dma(rvstate_t* s, uint32_t va, uint32_t len);
     16 
     17 // read a word from memory
     18 uint32_t rvsim_rd32(rvstate_t* s, uint32_t addr);
     19 
     20 
     21 // hook for "syscalls"
     22 uint32_t iocall(void* ctx, uint32_t n, const uint32_t args[8]);
     23 
     24 // hooks to implement io read/write access
     25 uint32_t ior32(uint32_t addr);
     26 void iow32(uint32_t addr, uint32_t val);
     27