commit f90b6cb0c8ed3bcb134c842e5e262a84b4965ac9
parent 8c2351f561f205e6e1ef9ac17a2867ef21d0d937
Author: Brian Swetland <swetland@frotz.net>
Date: Sun, 8 Mar 2020 23:43:24 -0700
housekeeping: third party code
- move third party code to better home
- drop a LICENSE file in for more clarity
- mention 3rd party code and license information in the readme
Diffstat:
7 files changed, 54 insertions(+), 15 deletions(-)
diff --git a/Makefile b/Makefile
@@ -4,7 +4,7 @@ all: bin/compiler bin/fs bin/r5d bin/r5e bin/mkinstab out/test/summary.txt
clean:
rm -rf bin out
-CFLAGS := -Wall -O2 -g
+CFLAGS := -Wall -O2 -g -Iexternal/oberon-risc-emu -Isrc
CC := gcc
bin/compiler: src/compiler.c src/risc5dis.c out/risc5ins.h
@@ -19,9 +19,13 @@ bin/r5d: src/r5d.c src/risc5dis.c out/risc5ins.h
@mkdir -p bin
$(CC) -o $@ $(CFLAGS) src/r5d.c src/risc5dis.c
-bin/r5e: src/r5e.c src/risc5emu.c src/risc5emu-fp.c src/risc5dis.c
+RISC5EMU_SRC := \
+ external/oberon-risc-emu/risc5emu.c \
+ external/oberon-risc-emu/risc5emu-fp.c \
+
+bin/r5e: src/r5e.c src/risc5dis.c $(RISC5EMU_SRC)
@mkdir -p bin
- $(CC) -o $@ $(CFLAGS) src/r5e.c src/risc5emu.c src/risc5emu-fp.c src/risc5dis.c
+ $(CC) -o $@ $(CFLAGS) src/r5e.c src/risc5dis.c $(RISC5EMU_SRC)
bin/mkinstab: src/mkinstab.c
@mkdir -p bin
diff --git a/external/oberon-risc-emu/LICENSE b/external/oberon-risc-emu/LICENSE
@@ -0,0 +1,15 @@
+Copyright © 2014 Peter De Wachter
+
+Permission to use, copy, modify, and/or distribute this software for
+any purpose with or without fee is hereby granted, provided that the
+above copyright notice and this permission notice appear in all
+copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+PERFORMANCE OF THIS SOFTWARE.
diff --git a/src/risc5emu-fp.c b/external/oberon-risc-emu/risc5emu-fp.c
diff --git a/src/risc5emu-fp.h b/external/oberon-risc-emu/risc5emu-fp.h
diff --git a/src/risc5emu.c b/external/oberon-risc-emu/risc5emu.c
diff --git a/src/risc5emu.h b/external/oberon-risc-emu/risc5emu.h
diff --git a/readme.md b/readme.md
@@ -3,13 +3,15 @@
> "O. Inspired by Oberon and gO, and it's like C without the sharp edges." - @adamwp
-It doesn't really have a name yet. The project is still very early. The syntax and features are
-incomplete and will change. It is way, way too early to do much of anything but watch
-me tinker with things, building this incrementally.
+It doesn't really have a name yet. The project is still very early.
+The syntax and features are incomplete and will change. It is way, way
+too early to do much of anything but watch me tinker with things,
+building this incrementally.
-The general plan is a small compiled systems language (in complexity, source size, and binary size)
-borrowing syntax from some of my favorite "braces languages", C, Go, and Rust, aiming to be a bit
-safer than C, and suitable for small, embedded, self-hosted systems.
+The general plan is a small compiled systems language (in complexity,
+source size, and binary size) borrowing syntax from some of my favorite
+"braces languages", C, Go, and Rust, aiming to be a bit safer than C,
+and suitable for small, embedded, self-hosted systems.
### [Why write a compiler?](docs/why-write-a-compiler.md)
@@ -19,11 +21,29 @@ safer than C, and suitable for small, embedded, self-hosted systems.
### Status
-It's currently compiling a subset of the work-in-progress language and generating binaries for
-the Project Oberon [Risc 5 Architecture](docs/project-oberon-risc5-architecture.txt).
+It's currently compiling a subset of the work-in-progress language and
+generating binaries for the Project Oberon
+[Risc 5 Architecture](docs/project-oberon-risc5-architecture.txt).
-I plan to also support RISCV (RV32I) as a target soonish, and if the project keeps moving
-will eventually target X86-64 because why not.
+I plan to also support RISCV (RV32I) as a target soonish, and if the
+project keeps moving will eventually target X86-64 because why not.
+
+It's presently written in C, but once the core language is suitably
+featureful and codegen is reasonably reliable I plan to translate it
+to itself and become self-hosted.
+
+### License and Third Party Code
+
+All of the code here is provided under the
+[Apache 2.0 License](https://www.apache.org/licenses/LICENSE-2.0.txt)
+with the exception of third party modules which live under the
+[external/](external/) directory.
+
+Notably, [external/oberon-risc-emu/](external/oberon-risc-emu/) contains
+the core RISC5 Emulator implemention from Peter Dr Wachter's excellent
+[Oberon Risc Emu](https://github.com/pdewacht/oberon-risc-emu), which is
+under a [BSD-like license](external/oberon-risc-emu/LICENSE).
+
+I borrowed just the CPU emulation for a simple commandline runtime. The
+original project is a full Project Oberon Workstation emulator.
-It's presently written in C, but once the core language is suitably featureful and codegen is
-reasonably reliable I plan to translate it to itself and become self-hosted.
