cpu32

commit c91d0ad169b52dfad697eafa4181983d772afeda
parent 82444bb46c4306a1eaafd5d12078f59183c919e6
Author: Brian Swetland <swetland@frotz.net>
Date:   Wed,  8 Feb 2012 14:56:22 -0800

cpu32: whitespace cleanup, add reset line

Diffstat:
M
verilog/cpu32.v
 | 
2
++

1 file changed, 2 insertions(+), 0 deletions(-)
diff --git a/verilog/cpu32.v b/verilog/cpu32.v
@@ -4,6 +4,7 @@
 
 module cpu32 (
 	input clk,
+	input reset,
 	output [31:0] i_addr,
 	input [31:0] i_data,
 	output [31:0] d_addr,
@@ -61,6 +62,7 @@ assign ctl_adata_zero = (adata == 32'h0);
 
 register #(32) PC (
 	.clk(clk),
+	.reset(reset),
 	.en(1),
 	.din(next_pc),
 	.dout(pc)