initial commit - ethernet-pmod - Unnamed repository; edit this file 'description' to name the repository.

commit d11e4b4665ae6c0b6184ff1ec5105ab004d4eac7
Author: Brian Swetland <swetland@frotz.net>
Date:   Sun, 29 May 2022 02:43:39 -0700

initial commit

Diffstat:
A .gitignore  | 4 ++++
A CERN-OHL-P-v2.txt  | 199 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A LICENSE.txt  | 10 ++++++++++
A export/ethernet-pmod-v2-layout.jpg  | 0 
A export/ethernet-pmod-v2-schematic.pdf  | 0 
A export/jlcpcb/ethernet-pmod.bom.csv  | 13 +++++++++++++
A export/jlcpcb/ethernet-pmod.pos.csv  | 24 ++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-B_Cu.gbr  | 3277 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-B_Mask.gbr  | 81 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-B_Paste.gbr  | 15 +++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-B_Silkscreen.gbr  | 498 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-Edge_Cuts.gbr  | 46 ++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-F_Cu.gbr  | 785 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-F_Mask.gbr  | 783 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-F_Paste.gbr  | 135 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-F_Silkscreen.gbr  | 1126 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-NPTH.drl  | 18 ++++++++++++++++++
A export/jlcpcb/gerbers/ethernet-pmod-PTH.drl  | 87 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A kicad/ethernet-pmod.kicad_pcb  | 4794 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A kicad/ethernet-pmod.kicad_pro  | 420 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A kicad/ethernet-pmod.kicad_sch  | 3173 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A pics/eth-pmod-back-from-fab.jpg  | 0 
A pics/eth-pmod-final-assembled.jpg  | 0 
A pics/eth-pmod-final-pcb.jpg  | 0 
A pics/eth-pmod-in-use.jpg  | 0 
A readme.md  | 32 ++++++++++++++++++++++++++++++++

26 files changed, 15520 insertions(+), 0 deletions(-)
diff --git a/.gitignore b/.gitignore
@@ -0,0 +1,4 @@
+fp-info-cache
+ethernet-pmod-backups
+ethernet-pmod.kicad_prl
+.*
diff --git a/CERN-OHL-P-v2.txt b/CERN-OHL-P-v2.txt
@@ -0,0 +1,199 @@
+CERN Open Hardware Licence Version 2 - Permissive
+
+
+Preamble
+
+CERN has developed this licence to promote collaboration among
+hardware designers and to provide a legal tool which supports the
+freedom to use, study, modify, share and distribute hardware designs
+and products based on those designs. Version 2 of the CERN Open
+Hardware Licence comes in three variants: this licence, CERN-OHL-P
+(permissive); and two reciprocal licences: CERN-OHL-W (weakly
+reciprocal) and CERN-OHL-S (strongly reciprocal).
+
+The CERN-OHL-P is copyright CERN 2020. Anyone is welcome to use it, in
+unmodified form only.
+
+Use of this Licence does not imply any endorsement by CERN of any
+Licensor or their designs nor does it imply any involvement by CERN in
+their development.
+
+
+1 Definitions
+
+  1.1 'Licence' means this CERN-OHL-P.
+
+  1.2 'Source' means information such as design materials or digital
+      code which can be applied to Make or test a Product or to
+      prepare a Product for use, Conveyance or sale, regardless of its
+      medium or how it is expressed. It may include Notices.
+
+  1.3 'Covered Source' means Source that is explicitly made available
+      under this Licence.
+
+  1.4 'Product' means any device, component, work or physical object,
+      whether in finished or intermediate form, arising from the use,
+      application or processing of Covered Source.
+
+  1.5 'Make' means to create or configure something, whether by
+      manufacture, assembly, compiling, loading or applying Covered
+      Source or another Product or otherwise.
+
+  1.6 'Notice' means copyright, acknowledgement and trademark notices,
+      references to the location of any Notices, modification notices
+      (subsection 3.3(b)) and all notices that refer to this Licence
+      and to the disclaimer of warranties that are included in the
+      Covered Source.
+
+  1.7 'Licensee' or 'You' means any person exercising rights under
+      this Licence.
+
+  1.8 'Licensor' means a person who creates Source or modifies Covered
+      Source and subsequently Conveys the resulting Covered Source
+      under the terms and conditions of this Licence. A person may be
+      a Licensee and a Licensor at the same time.
+
+  1.9 'Convey' means to communicate to the public or distribute.
+
+
+2 Applicability
+
+  2.1 This Licence governs the use, copying, modification, Conveying
+      of Covered Source and Products, and the Making of Products. By
+      exercising any right granted under this Licence, You irrevocably
+      accept these terms and conditions.
+
+  2.2 This Licence is granted by the Licensor directly to You, and
+      shall apply worldwide and without limitation in time.
+
+  2.3 You shall not attempt to restrict by contract or otherwise the
+      rights granted under this Licence to other Licensees.
+
+  2.4 This Licence is not intended to restrict fair use, fair dealing,
+      or any other similar right.
+
+
+3 Copying, Modifying and Conveying Covered Source
+
+  3.1 You may copy and Convey verbatim copies of Covered Source, in
+      any medium, provided You retain all Notices.
+
+  3.2 You may modify Covered Source, other than Notices.
+
+      You may only delete Notices if they are no longer applicable to
+      the corresponding Covered Source as modified by You and You may
+      add additional Notices applicable to Your modifications.
+
+  3.3 You may Convey modified Covered Source (with the effect that You
+      shall also become a Licensor) provided that You:
+
+       a) retain Notices as required in subsection 3.2; and
+
+       b) add a Notice to the modified Covered Source stating that You
+          have modified it, with the date and brief description of how
+          You have modified it.
+
+  3.4 You may Convey Covered Source or modified Covered Source under
+      licence terms which differ from the terms of this Licence
+      provided that You:
+
+       a) comply at all times with subsection 3.3; and
+
+       b) provide a copy of this Licence to anyone to whom You
+          Convey Covered Source or modified Covered Source.
+
+
+4 Making and Conveying Products
+
+You may Make Products, and/or Convey them, provided that You ensure
+that the recipient of the Product has access to any Notices applicable
+to the Product.
+
+
+5 DISCLAIMER AND LIABILITY
+
+  5.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products
+      are provided 'as is' and any express or implied warranties,
+      including, but not limited to, implied warranties of
+      merchantability, of satisfactory quality, non-infringement of
+      third party rights, and fitness for a particular purpose or use
+      are disclaimed in respect of any Source or Product to the
+      maximum extent permitted by law. The Licensor makes no
+      representation that any Source or Product does not or will not
+      infringe any patent, copyright, trade secret or other
+      proprietary right. The entire risk as to the use, quality, and
+      performance of any Source or Product shall be with You and not
+      the Licensor. This disclaimer of warranty is an essential part
+      of this Licence and a condition for the grant of any rights
+      granted under this Licence.
+
+  5.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to
+      the maximum extent permitted by law, have no liability for
+      direct, indirect, special, incidental, consequential, exemplary,
+      punitive or other damages of any character including, without
+      limitation, procurement of substitute goods or services, loss of
+      use, data or profits, or business interruption, however caused
+      and on any theory of contract, warranty, tort (including
+      negligence), product liability or otherwise, arising in any way
+      in relation to the Covered Source, modified Covered Source
+      and/or the Making or Conveyance of a Product, even if advised of
+      the possibility of such damages, and You shall hold the
+      Licensor(s) free and harmless from any liability, costs,
+      damages, fees and expenses, including claims by third parties,
+      in relation to such use.
+
+
+6 Patents
+
+  6.1 Subject to the terms and conditions of this Licence, each
+      Licensor hereby grants to You a perpetual, worldwide,
+      non-exclusive, no-charge, royalty-free, irrevocable (except as
+      stated in this section 6, or where terminated by the Licensor
+      for cause) patent licence to Make, have Made, use, offer to
+      sell, sell, import, and otherwise transfer the Covered Source
+      and Products, where such licence applies only to those patent
+      claims licensable by such Licensor that are necessarily
+      infringed by exercising rights under the Covered Source as
+      Conveyed by that Licensor.
+
+  6.2 If You institute patent litigation against any entity (including
+      a cross-claim or counterclaim in a lawsuit) alleging that the
+      Covered Source or a Product constitutes direct or contributory
+      patent infringement, or You seek any declaration that a patent
+      licensed to You under this Licence is invalid or unenforceable
+      then any rights granted to You under this Licence shall
+      terminate as of the date such process is initiated.
+
+
+7 General
+
+  7.1 If any provisions of this Licence are or subsequently become
+      invalid or unenforceable for any reason, the remaining
+      provisions shall remain effective.
+
+  7.2 You shall not use any of the name (including acronyms and
+      abbreviations), image, or logo by which the Licensor or CERN is
+      known, except where needed to comply with section 3, or where
+      the use is otherwise allowed by law. Any such permitted use
+      shall be factual and shall not be made so as to suggest any kind
+      of endorsement or implication of involvement by the Licensor or
+      its personnel.
+
+  7.3 CERN may publish updated versions and variants of this Licence
+      which it considers to be in the spirit of this version, but may
+      differ in detail to address new problems or concerns. New
+      versions will be published with a unique version number and a
+      variant identifier specifying the variant. If the Licensor has
+      specified that a given variant applies to the Covered Source
+      without specifying a version, You may treat that Covered Source
+      as being released under any version of the CERN-OHL with that
+      variant. If no variant is specified, the Covered Source shall be
+      treated as being released under CERN-OHL-S. The Licensor may
+      also specify that the Covered Source is subject to a specific
+      version of the CERN-OHL or any later version in which case You
+      may apply this or any later version of CERN-OHL with the same
+      variant identifier published by CERN.
+
+  7.4 This Licence shall not be enforceable except by a Licensor
+      acting as such, and third party beneficiary rights are
+      specifically excluded.
diff --git a/LICENSE.txt b/LICENSE.txt
@@ -0,0 +1,10 @@
+Copyright 2022, Brian Swetland <swetland@frotz.net>
+
+This source describes Open Hardware and is licensed under the CERN-OHL-P v2
+
+You may redistribute and modify this documentation and make products using
+it under the terms of the CERN-OHL-P v2 (https:/cern.ch/cern-ohl).
+
+This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED WARRANTY,
+INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY AND FITNESS FOR A
+PARTICULAR PURPOSE. Please see the CERN-OHL-P v2 for applicable conditions
diff --git a/export/ethernet-pmod-v2-layout.jpg b/export/ethernet-pmod-v2-layout.jpg
Binary files differ.
diff --git a/export/ethernet-pmod-v2-schematic.pdf b/export/ethernet-pmod-v2-schematic.pdf
Binary files differ.
diff --git a/export/jlcpcb/ethernet-pmod.bom.csv b/export/jlcpcb/ethernet-pmod.bom.csv
@@ -0,0 +1,13 @@
+Comment,Designator,Footprint,"JLCPCB Part #"
+0.01uF,"C1,C2,C3",0402_C,C15195
+1uF,"C4,C5",0402_C,C52923
+1uF,"C6,C7",0603_C,C15849
+470pF,C8,0402_C,C1537
+0.022uF,C9,0402_C,C1532
+FerriteBead,FB1,0805_I,C1015
+49.9,"R1,R2,R3,R4",0402_R,C25120
+12.1K,R5,0402_R,C25852
+270,"R6,R7",0402_R,C25099
+10K,"R8,R9,R10,R11",0402_R,C25744
+1.5K,R12,0402_R,C25867
+LAN8720A,U1,VQFN-24,C45223
diff --git a/export/jlcpcb/ethernet-pmod.pos.csv b/export/jlcpcb/ethernet-pmod.pos.csv
@@ -0,0 +1,24 @@
+Designator,Mid X,Mid Y,Layer,Rotation
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+C7,73.66,-70.3835,T,-90
+C8,70.6,-60,T,0
+C9,82.296,-69.596,T,90
+FB1,76.2,-70.104,T,90
+R1,82.296,-60.2,T,-90
+R2,82.296,-62.6,T,90
+R3,82.296,-65,T,-90
+R4,82.296,-67.4,T,90
+R5,76.6,-62,T,0
+R6,82.296,-72.136,T,90
+R7,82.296,-56.411,T,-90
+R8,64.0007,-63.8123,T,-90
+R9,65.2627,-63.8123,T,-90
+R10,66.0393,-61.7318,T,90
+R11,66.0489,-59.3916,T,-90
+R12,58.4,-71.085,T,90
+U1,72.6,-63.6,T,-180
diff --git a/export/jlcpcb/gerbers/ethernet-pmod-B_Cu.gbr b/export/jlcpcb/gerbers/ethernet-pmod-B_Cu.gbr
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diff --git a/export/jlcpcb/gerbers/ethernet-pmod-B_Mask.gbr b/export/jlcpcb/gerbers/ethernet-pmod-B_Mask.gbr
@@ -0,0 +1,81 @@
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diff --git a/export/jlcpcb/gerbers/ethernet-pmod-F_Mask.gbr b/export/jlcpcb/gerbers/ethernet-pmod-F_Mask.gbr
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diff --git a/export/jlcpcb/gerbers/ethernet-pmod-NPTH.drl b/export/jlcpcb/gerbers/ethernet-pmod-NPTH.drl
@@ -0,0 +1,18 @@
+M48
+; DRILL file {KiCad 6.0.4-6f826c9f35~116~ubuntu20.04.1} date Mon 16 May 2022 01:03:08 PM PDT
+; FORMAT={-:-/ absolute / inch / decimal}
+; #@! TF.CreationDate,2022-05-16T13:03:08-07:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,6.0.4-6f826c9f35~116~ubuntu20.04.1
+; #@! TF.FileFunction,NonPlated,1,2,NPTH
+FMAT,2
+INCH
+; #@! TA.AperFunction,NonPlated,NPTH,ComponentDrill
+T1C0.1280
+%
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diff --git a/export/jlcpcb/gerbers/ethernet-pmod-PTH.drl b/export/jlcpcb/gerbers/ethernet-pmod-PTH.drl
@@ -0,0 +1,87 @@
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+; #@! TF.CreationDate,2022-05-16T13:03:08-07:00
+; #@! TF.GenerationSoftware,Kicad,Pcbnew,6.0.4-6f826c9f35~116~ubuntu20.04.1
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diff --git a/kicad/ethernet-pmod.kicad_pcb b/kicad/ethernet-pmod.kicad_pcb
@@ -0,0 +1,4794 @@
+(kicad_pcb (version 20211014) (generator pcbnew)
+
+  (general
+    (thickness 1.6)
+  )
+
+  (paper "USLetter")
+  (title_block
+    (title "Ethernet PMOD")
+    (rev "1.0")
+  )
+
+  (layers
+    (0 "F.Cu" signal)
+    (31 "B.Cu" signal)
+    (32 "B.Adhes" user "B.Adhesive")
+    (33 "F.Adhes" user "F.Adhesive")
+    (34 "B.Paste" user)
+    (35 "F.Paste" user)
+    (36 "B.SilkS" user "B.Silkscreen")
+    (37 "F.SilkS" user "F.Silkscreen")
+    (38 "B.Mask" user)
+    (39 "F.Mask" user)
+    (40 "Dwgs.User" user "User.Drawings")
+    (41 "Cmts.User" user "User.Comments")
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+  (net 20 "/RXP")
+  (net 21 "/RXN")
+  (net 22 "/LED2")
+  (net 23 "/RBIAS")
+  (net 24 "/LED1")
+  (net 25 "/CLKIN")
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diff --git a/kicad/ethernet-pmod.kicad_pro b/kicad/ethernet-pmod.kicad_pro
@@ -0,0 +1,420 @@
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diff --git a/kicad/ethernet-pmod.kicad_sch b/kicad/ethernet-pmod.kicad_sch
@@ -0,0 +1,3173 @@
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+    (date "2022-05-16")
+    (rev "2")
+    (comment 3 "This source describes Open Hardware and is licensed under the CERN-OHL-P v2\n")
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+    (path "/00000000-0000-0000-0000-00005c0a148e"
+      (reference "#PWR0107") (unit 1) (value "VCC") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0ab5a8"
+      (reference "#PWR0108") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0ab5d3"
+      (reference "#PWR0109") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0ab5fe"
+      (reference "#PWR0110") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0ab629"
+      (reference "#PWR0111") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0f3934"
+      (reference "#PWR0112") (unit 1) (value "VCC") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0f395f"
+      (reference "#PWR0113") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c0fc812"
+      (reference "#PWR0114") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c1132ee"
+      (reference "#PWR0115") (unit 1) (value "VCC") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c177c0d"
+      (reference "#PWR0116") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c22849c"
+      (reference "#PWR0118") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c2284d9"
+      (reference "#PWR0119") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c2e3c3a"
+      (reference "#PWR0122") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c374eed"
+      (reference "#PWR0123") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c374f34"
+      (reference "#PWR0124") (unit 1) (value "VCC") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c492e3b"
+      (reference "#PWR0125") (unit 1) (value "GND") (footprint "")
+    )
+    (path "/00000000-0000-0000-0000-00005c078e60"
+      (reference "C1") (unit 1) (value "0.01uF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c078e08"
+      (reference "C2") (unit 1) (value "0.01uF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c078ebe"
+      (reference "C3") (unit 1) (value "0.01uF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c0798da"
+      (reference "C4") (unit 1) (value "1uF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c078ac2"
+      (reference "C5") (unit 1) (value "1uF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c20d624"
+      (reference "C6") (unit 1) (value "1uF") (footprint "Capacitor_SMD:C_0603_1608Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c20d6c4"
+      (reference "C7") (unit 1) (value "1uF") (footprint "Capacitor_SMD:C_0603_1608Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c078f06"
+      (reference "C8") (unit 1) (value "470pF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c177c44"
+      (reference "C9") (unit 1) (value "0.022uF") (footprint "Capacitor_SMD:C_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c14c9bc"
+      (reference "FB1") (unit 1) (value "Ferrite Bead") (footprint "Inductor_SMD:L_0805_2012Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c05fba2"
+      (reference "J1") (unit 1) (value "PMOD") (footprint "FrotzNet:PMOD_Peripheral_Conn_2x06_P2.54mm_Vertical")
+    )
+    (path "/00000000-0000-0000-0000-00005c067d36"
+      (reference "J2") (unit 1) (value "RJ45_AMP_RJMG1") (footprint "Connector_RJ:RJ45_Amphenol_RJMG1BD3B8K1ANR")
+    )
+    (path "/00000000-0000-0000-0000-00005c2c91aa"
+      (reference "J3") (unit 1) (value "MDIO") (footprint "Connector_PinSocket_2.54mm:PinSocket_1x03_P2.54mm_Vertical")
+    )
+    (path "/00000000-0000-0000-0000-00005c069ad0"
+      (reference "R1") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c069afc"
+      (reference "R2") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c05f0b3"
+      (reference "R3") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c069a9a"
+      (reference "R4") (unit 1) (value "49.9") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c0f9926"
+      (reference "R5") (unit 1) (value "12.1K") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c06cd5c"
+      (reference "R6") (unit 1) (value "270") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c06ce90"
+      (reference "R7") (unit 1) (value "270") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c10147e"
+      (reference "R8") (unit 1) (value "10K") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c10317e"
+      (reference "R9") (unit 1) (value "10K") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c10136a"
+      (reference "R10") (unit 1) (value "10K") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c101434"
+      (reference "R11") (unit 1) (value "10K") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c31b47e"
+      (reference "R12") (unit 1) (value "1.5K") (footprint "Resistor_SMD:R_0402_1005Metric")
+    )
+    (path "/00000000-0000-0000-0000-00005c05dde4"
+      (reference "U1") (unit 1) (value "LAN8720A") (footprint "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias")
+    )
+  )
+)
diff --git a/pics/eth-pmod-back-from-fab.jpg b/pics/eth-pmod-back-from-fab.jpg
Binary files differ.
diff --git a/pics/eth-pmod-final-assembled.jpg b/pics/eth-pmod-final-assembled.jpg
Binary files differ.
diff --git a/pics/eth-pmod-final-pcb.jpg b/pics/eth-pmod-final-pcb.jpg
Binary files differ.
diff --git a/pics/eth-pmod-in-use.jpg b/pics/eth-pmod-in-use.jpg
Binary files differ.
diff --git a/readme.md b/readme.md
@@ -0,0 +1,32 @@
+# Ethernet PMOD v2
+
+This PCB is a PMOD (FPGA development board peripheral module) for the
+Microchip LAN8720A PHY, to enable 10/100M Ethernet connectivity.
+
+It is configured to accept the necessary 50MHz clock from the FPGA, and
+exchanges data using the [RMII standard](https://en.wikipedia.org/wiki/Media-independent_interface#RMII).  A secondary header provides access
+to the MDIO/MDC lines to allow access to the management interface.
+
+I have manufactured 10 of these using JLCPCB's PCB fabrication and assembly
+service (manually soldering the two throw-hole components myself) and have
+used this PMOD successfully with Litex / LiteETH / VexRiscv on a Muse Lab
+iCE Sugar Pro FPGA board.
+
+This project is licensed under the [CERN OHL P v2](CERN-OHL-P-v2.txt) Permissive Open Hardware License.
+
+## Design Files and Resources
+
+Original design files are here: [kicad/](kicad/)
+
+Schematic in PDF format here: [export/ethernet-pmod-v2-schematic.pdf](export/ethernet-pmod-v2-schematic.pdf)
+
+Gerbers and CSV files used for a successful JLCPCB order, under [export/jlcpcb/](export/jlcpcb/)
+
+Documentation on the Microchip LAN8720A: https://www.microchip.com/en-us/product/LAN8720A
+
+## Pictures
+
+![final assembled pmod](pics/eth-pmod-final-assembled.jpg)
+
+![pmod in use](pics/eth-pmod-in-use.jpg)
+

	ethernet-pmod Unnamed repository; edit this file 'description' to name the repository.
	Log \| Files \| Refs

A	.gitignore	\|	4	++++
A	CERN-OHL-P-v2.txt	\|	199	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	LICENSE.txt	\|	10	++++++++++
A	export/ethernet-pmod-v2-layout.jpg	\|	0
A	export/ethernet-pmod-v2-schematic.pdf	\|	0
A	export/jlcpcb/ethernet-pmod.bom.csv	\|	13	+++++++++++++
A	export/jlcpcb/ethernet-pmod.pos.csv	\|	24	++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-B_Cu.gbr	\|	3277	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-B_Mask.gbr	\|	81	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-B_Paste.gbr	\|	15	+++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-B_Silkscreen.gbr	\|	498	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-Edge_Cuts.gbr	\|	46	++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-F_Cu.gbr	\|	785	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-F_Mask.gbr	\|	783	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-F_Paste.gbr	\|	135	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-F_Silkscreen.gbr	\|	1126	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-NPTH.drl	\|	18	++++++++++++++++++
A	export/jlcpcb/gerbers/ethernet-pmod-PTH.drl	\|	87	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	kicad/ethernet-pmod.kicad_pcb	\|	4794	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	kicad/ethernet-pmod.kicad_pro	\|	420	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	kicad/ethernet-pmod.kicad_sch	\|	3173	+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
A	pics/eth-pmod-back-from-fab.jpg	\|	0
A	pics/eth-pmod-final-assembled.jpg	\|	0
A	pics/eth-pmod-final-pcb.jpg	\|	0
A	pics/eth-pmod-in-use.jpg	\|	0
A	readme.md	\|	32	++++++++++++++++++++++++++++++++