verilator-sim.mk (1515B)
1 ## Copyright 2018 Brian Swetland <swetland@frotz.net> 2 ## 3 ## Licensed under the Apache License, Version 2.0 4 ## http://www.apache.org/licenses/LICENSE-2.0 5 6 PROJECT_OBJDIR := out/-vsim-/$(PROJECT_NAME) 7 PROJECT_RUN := $(PROJECT_NAME)-vsim 8 PROJECT_BIN := out/$(PROJECT_NAME)-vsim 9 10 PROJECT_VLG_SRCS := $(filter %.v %.sv,$(PROJECT_SRCS)) 11 12 PROJECT_OPTS := --top-module testbench 13 PROJECT_OPTS += --Mdir $(PROJECT_OBJDIR) 14 PROJECT_OPTS += --exe ../../src/testbench.cpp ../../src/sim-sdram.cpp 15 PROJECT_OPTS += --cc 16 PROJECT_OPTS += -o ../../$(PROJECT_NAME)-vsim 17 PROJECT_OPTS += -DSIMULATION 18 PROJECT_OPTS += $(PROJECT_VOPTS) 19 20 PROJECT_OPTS += -CFLAGS -DTRACE --trace 21 22 $(PROJECT_BIN): _NAME := $(PROJECT_NAME) 23 $(PROJECT_BIN): _SRCS := $(PROJECT_VLG_SRCS) 24 $(PROJECT_BIN): _OPTS := $(PROJECT_OPTS) 25 $(PROJECT_BIN): _DIR := $(PROJECT_OBJDIR) 26 27 $(PROJECT_BIN): $(PROJECT_SRCS) $(PROJECT_DEF) src/testbench.cpp src/sim-sdram.cpp 28 @mkdir -p $(_DIR) bin 29 @echo "COMPILE (verilator): $(_NAME)" 30 @$(VERILATOR) $(_OPTS) $(_SRCS) 31 @echo "COMPILE (C++): $(_NAME)" 32 make -C $(_DIR) -f Vtestbench.mk 33 34 $(PROJECT_NAME): $(PROJECT_BIN) 35 36 $(PROJECT_RUN): _LOGFILE := out/sim/$(PROJECT_NAME).log 37 $(PROJECT_RUN): _VCDFILE := out/sim/$(PROJECT_NAME).vcd 38 $(PROJECT_RUN): $(PROJECT_BIN) 39 @mkdir -p out/sim 40 @$< -trace $(_VCDFILE) > $(_LOGFILE) 41 42 ALL_TARGETS += $(PROJECT_NAME) $(PROJECT_RUN) 43 ALL_BUILDS += $(PROJECT_NAME) 44 45 TARGET_$(PROJECT_NAME)_DESC := build verilator sim: $(PROJECT_BIN) 46 TARGET_$(PROJECT_RUN)_DESC := run verilator sim: $(PROJECT_BIN) 47