gateware

A collection of little open source FPGA hobby projects
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board_lattice_evb.v (749B)

      1 // Copyright 2018, Brian Swetland <swetland@frotz.net>
      2 // Licensed under the Apache License, Version 2.0.
      3 
      4 `default_nettype none
      5 
      6 module top(
      7 	input clk12m_in,
      8 	output [1:0]vga_red,
      9 	output [1:0]vga_grn,
     10 	output [1:0]vga_blu,
     11 	output vga_hsync,
     12 	output vga_vsync,
     13 	input spi_mosi,
     14 	output spi_miso,
     15 	input spi_clk,
     16 	input spi_cs,
     17 	output out1,
     18 	output out2
     19 	);
     20 
     21 system_cpu16_vga40x30 #(
     22 	.BPP(2)
     23 	) system (
     24 	.clk12m_in(clk12m_in),
     25 	.vga_red(vga_red),
     26 	.vga_grn(vga_grn),
     27 	.vga_blu(vga_blu),
     28 	.vga_hsync(vga_hsync),
     29 	.vga_vsync(vga_vsync),
     30 	.vga_active(),
     31 	.vga_clk(),
     32 	.spi_mosi(spi_mosi),
     33 	.spi_miso(spi_miso),
     34 	.spi_clk(spi_clk),
     35 	.spi_cs(spi_cs),
     36 	.uart_rx(1'b0),
     37 	.uart_tx(),
     38 	.led_grn(),
     39 	.led_red(),
     40 	.out1(out1),
     41 	.out2(out2)
     42 	);
     43 
     44 endmodule