os-workshop

commit 377b132bd6f86892da7f077ce8eb1ba1ce95d200
parent f6fa58cce08278734144b46f83c95cab99ee4f42
Author: Brian Swetland <swetland@frotz.net>
Date:   Mon, 25 Apr 2022 01:00:18 -0700

hw: update riscv header and add some intc headers

Diffstat:
A
hw/inc/hw/riscv-clint.h
 | 
7
+++++++
A
hw/inc/hw/riscv-plic.h
 | 
13
+++++++++++++
M
hw/inc/hw/riscv.h
 | 
13
+++++++++++++

3 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/hw/inc/hw/riscv-clint.h b/hw/inc/hw/riscv-clint.h
@@ -0,0 +1,7 @@
+
+// Core Local Interrupter
+
+#pragma once
+
+#define CLINT_MTIMECMP(id)	(0x4000 + 8 * (id))
+#define CLINT_MTIME		0xBFF8
diff --git a/hw/inc/hw/riscv-plic.h b/hw/inc/hw/riscv-plic.h
@@ -0,0 +1,13 @@
+
+// Platform Level Interrupt Controller
+
+#pragma once
+
+#define PLIC_PRIORITY		(0x000000)
+#define PLIC_PENDING		(0x001000)
+#define PLIC_MENABLE(id)	(0x002000 + 0x100 * (id))
+#define PLIC_SENABLE(id)	(0x002080 + 0x100 * (id))
+#define PLIC_MPRIORITY(id)	(0x200000 + 0x2000 * (id))
+#define PLIC_SPRIORITY(id)	(0x201000 + 0x2000 * (id))
+#define PLIC_MCLAIN(id)		(0x200004 + 0x2000 * (id))
+#define PLIC_SCLAIM(id)		(0x201004 + 0x2000 * (id))
diff --git a/hw/inc/hw/riscv.h b/hw/inc/hw/riscv.h
@@ -53,6 +53,9 @@
 #define CSR_MCYCLE     0xB00 // Machine Cycle Counter
 #define CSR_MINSTRET   0xB02 // Machine Instructions Retired
 
+#define CSR_PMPCFG(n)  (0x3A0+(n)) // 0-15
+#define CSR_PMPADDR(n) (0x3B0+(n)) // 0-63
+
 // CSR_MSTATUS bits
 #define MSTATUS_TSR  0x00400000U // Trap SRET
 #define MSTATUS_TW   0x00200000U // Timeout Wait (trap on WFI)
@@ -130,6 +133,16 @@
 #define EXCb_LOAD_PAGE_FAULT       (1U << 13)
 #define EXCb_STORE_PAGE_FAULT      (1U << 15)
 
+
+#define PMP_CFG_LOCK    (1U << 7) // disallow further rights until reset
+#define PMP_CFG_A_OFF   (0U << 3) // disable this entry
+#define PMP_CFG_A_TOR   (1U << 3) // match top of range (prev entry is bottom)
+#define PMP_CFG_A_NA4   (2U << 3) // match naturally aligned 4byte
+#define PMP_CFG_A_NAPOT (3U << 3) // match naturally aligned power of two
+#define PMP_CFG_X       (1U << 2) // execute
+#define PMP_CFG_W       (1U << 1) // write
+#define PMP_CFG_R       (1U << 0) // read
+
 // inline assembly helpers for CSR access, etc
 #ifndef __ASSEMBLER__
 #include <stdint.h>