commit 5a586737ea493d0e3de55b44fb063e6adee5eaf3 parent 0791698b09f06780b98400b352134843be064d5b Author: Brian Swetland <swetland@frotz.net> Date: Sat, 7 May 2022 10:16:32 -0700 hw: update platform.h Diffstat:
| M | hw/inc/hw/platform.h | | | 31 | +++++++++++++++++++------------ |
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/hw/inc/hw/platform.h b/hw/inc/hw/platform.h @@ -5,16 +5,27 @@ #include <hw/vexriscv.h> // Memory Map -#define DRAM_BASE 0x40000000 -#define DRAM_SIZE (32*1024*1024) -#define BIOS_SIZE 0x8000 - -#define TIMER0_BASE 0xF0002000 -#define UART0_BASE 0xF0002800 +#define DRAM_BASE 0x40000000 +#define FRAMEBUFFER_BASE 0x40C00000 // default fb dma base +#define DRAM_SIZE (32*1024*1024) +#define BIOS_SIZE 0x00008000 +#define MMIO_BASE 0xF0000000 + +// MMIO Devices +#define CTRL_BASE 0xF0000000 +#define IDENT_BASE 0xF0000800 +#define LEDS_BASE 0xF0001000 +#define TIMER0_BASE 0xF0002000 +#define UART0_BASE 0xF0002800 +#define VFB_BASE 0xF0003000 +#define VFB_VTG_BASE 0xF0003800 +#define SPIFLASH_CORE_BASE 0xF0004000 +#define SPICLASH_PHY_BASE 0xF0004800 +#define SPISDCARD_BASE 0xF0005000 // Peripheral Interrupt Numbers -#define TIMER0_IRQn 1 -#define UART0_IRQn 0 +#define TIMER0_IRQn 0 +#define UART0_IRQn 1 // Peripheral Interrupt Bits #define TIMER0_IRQb (1U << TIMER0_IRQn) @@ -37,12 +48,8 @@ static inline void ext_irq_enable(uint32_t bit) { static inline void ext_irq_disable(uint32_t bit) { csr_clr(CSR_S_INTC_ENABLE, bit); } - static inline int ext_irq_pending(uint32_t bit) { return !!(csr_read(CSR_S_INTC_PENDING) & bit); } -static inline void ext_irq_ack(uint32_t bit) { - csr_set(CSR_S_INTC_PENDING, bit); -} #endif