spl

systems programming language
git clone http://frotz.net/git/spl.git
Log | Files | Refs | README | LICENSE

commit 016d9275bc810ebc79378363fd100aa521c3e664
parent a836e0046e8cab27378344b7fab0eae8d31772fd
Author: Brian Swetland <swetland@frotz.net>
Date:   Sun, 29 Jun 2025 11:40:58 -0700

sr32asm: generate correct sequence for li with bit 15 set

Diffstat:
Msoftrisc32/src/sr32asm.c | 7+++++--
1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/softrisc32/src/sr32asm.c b/softrisc32/src/sr32asm.c @@ -588,13 +588,16 @@ int parse_line(State *s) { emit(ins_r(0, 0, a, t, IR_ADD)); break; case tLI: - // todo: edge case for bit15 set in lsh expect_r_c(s, &t); i = expect_num(s); if (is_signed16(i)) { emit(ins_i(i, 0, t, IR_ADD)); } else { - emit(ins_l(i >> 16, 0, t, L_LUI)); + uint32_t hi = i >> 16; + if (i & 0x8000) { + hi += 1; + } + emit(ins_l(hi, 0, t, L_LUI)); if (i & 0xFFFF) { emit(ins_i(i & 0xFFFF, t, t, IR_ADD)); }