spl

commit a087109d5b935fa0146a457750103eaeb622ca32
parent 25667df6698623ebc9b00eda204a0444bbb2759a
Author: Brian Swetland <swetland@frotz.net>
Date:   Mon, 30 Jun 2025 17:58:49 -0700

sr32asm: support the full set of riscv abi register names

Might want to rearrange them, but at the moment there's no
harm in leaving them in the kinda odd order that riscv uses.

Diffstat:
M
softrisc32/src/assemble-sr32.c
 | 
7
+++++--

1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/softrisc32/src/assemble-sr32.c b/softrisc32/src/assemble-sr32.c
@@ -297,12 +297,15 @@ typedef struct State {
 	char sbuf[SMAXSIZE + 1];
 } State;
 
-static char* rnames[] = {
+static char* rnames[64] = {
 	"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
 	"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
 	"x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
 	"x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31",
-	"zero", "ra", "sp",
+	"zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2",
+	"s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5",
+	"a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",
+	"s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6",
 };
 
 // may be called once after nextchar