nexys4.xdc (39014B)
1 ## This file is a general .xdc for the Nexys4 rev B board 2 ## To use it in a project: 3 ## - uncomment the lines corresponding to used pins 4 ## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project 5 6 ## Clock signal 7 ##Bank = 35, Pin name = IO_L12P_T1_MRCC_35, Sch name = CLK100MHZ 8 set_property PACKAGE_PIN E3 [get_ports clk] 9 set_property IOSTANDARD LVCMOS33 [get_ports clk] 10 create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk] 11 12 13 # 30 MHz JTAG TCK 14 create_clock -period 33.333 -name jtag_tck [get_pins log0/port0/bscan/TCK] 15 16 # human readable generated clock name 17 create_generated_clock -name clk50 [get_pins mmcm0/mmcm_adv_inst/CLKOUT0] 18 19 set_clock_groups -asynchronous -group [get_clocks -include_generated_clocks sys_clk_pin] -group jtag_tck 20 21 22 ## Switches 23 ##Bank = 34, Pin name = IO_L21P_T3_DQS_34, Sch name = SW0 24 #set_property PACKAGE_PIN U9 [get_ports {sw[0]}] 25 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}] 26 ##Bank = 34, Pin name = IO_25_34, Sch name = SW1 27 #set_property PACKAGE_PIN U8 [get_ports {sw[1]}] 28 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}] 29 ##Bank = 34, Pin name = IO_L23P_T3_34, Sch name = SW2 30 #set_property PACKAGE_PIN R7 [get_ports {sw[2]}] 31 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[2]}] 32 ##Bank = 34, Pin name = IO_L19P_T3_34, Sch name = SW3 33 #set_property PACKAGE_PIN R6 [get_ports {sw[3]}] 34 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[3]}] 35 ##Bank = 34, Pin name = IO_L19N_T3_VREF_34, Sch name = SW4 36 #set_property PACKAGE_PIN R5 [get_ports {sw[4]}] 37 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[4]}] 38 ##Bank = 34, Pin name = IO_L20P_T3_34, Sch name = SW5 39 #set_property PACKAGE_PIN V7 [get_ports {sw[5]}] 40 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[5]}] 41 ##Bank = 34, Pin name = IO_L20N_T3_34, Sch name = SW6 42 #set_property PACKAGE_PIN V6 [get_ports {sw[6]}] 43 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[6]}] 44 ##Bank = 34, Pin name = IO_L10P_T1_34, Sch name = SW7 45 #set_property PACKAGE_PIN V5 [get_ports {sw[7]}] 46 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[7]}] 47 ##Bank = 34, Pin name = IO_L8P_T1-34, Sch name = SW8 48 #set_property PACKAGE_PIN U4 [get_ports {sw[8]}] 49 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[8]}] 50 ##Bank = 34, Pin name = IO_L9N_T1_DQS_34, Sch name = SW9 51 #set_property PACKAGE_PIN V2 [get_ports {sw[9]}] 52 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[9]}] 53 ##Bank = 34, Pin name = IO_L9P_T1_DQS_34, Sch name = SW10 54 #set_property PACKAGE_PIN U2 [get_ports {sw[10]}] 55 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[10]}] 56 ##Bank = 34, Pin name = IO_L11N_T1_MRCC_34, Sch name = SW11 57 #set_property PACKAGE_PIN T3 [get_ports {sw[11]}] 58 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[11]}] 59 ##Bank = 34, Pin name = IO_L17N_T2_34, Sch name = SW12 60 #set_property PACKAGE_PIN T1 [get_ports {sw[12]}] 61 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[12]}] 62 ##Bank = 34, Pin name = IO_L11P_T1_SRCC_34, Sch name = SW13 63 #set_property PACKAGE_PIN R3 [get_ports {sw[13]}] 64 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[13]}] 65 ##Bank = 34, Pin name = IO_L14N_T2_SRCC_34, Sch name = SW14 66 #set_property PACKAGE_PIN P3 [get_ports {sw[14]}] 67 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[14]}] 68 ##Bank = 34, Pin name = IO_L14P_T2_SRCC_34, Sch name = SW15 69 #set_property PACKAGE_PIN P4 [get_ports {sw[15]}] 70 #set_property IOSTANDARD LVCMOS33 [get_ports {sw[15]}] 71 72 73 74 ## LEDs 75 ##Bank = 34, Pin name = IO_L24N_T3_34, Sch name = LED0 76 set_property PACKAGE_PIN T8 [get_ports {led[0]}] 77 set_property IOSTANDARD LVCMOS33 [get_ports {led[0]}] 78 ##Bank = 34, Pin name = IO_L21N_T3_DQS_34, Sch name = LED1 79 set_property PACKAGE_PIN V9 [get_ports {led[1]}] 80 set_property IOSTANDARD LVCMOS33 [get_ports {led[1]}] 81 ##Bank = 34, Pin name = IO_L24P_T3_34, Sch name = LED2 82 set_property PACKAGE_PIN R8 [get_ports {led[2]}] 83 set_property IOSTANDARD LVCMOS33 [get_ports {led[2]}] 84 ##Bank = 34, Pin name = IO_L23N_T3_34, Sch name = LED3 85 set_property PACKAGE_PIN T6 [get_ports {led[3]}] 86 set_property IOSTANDARD LVCMOS33 [get_ports {led[3]}] 87 ##Bank = 34, Pin name = IO_L12P_T1_MRCC_34, Sch name = LED4 88 set_property PACKAGE_PIN T5 [get_ports {led[4]}] 89 set_property IOSTANDARD LVCMOS33 [get_ports {led[4]}] 90 ##Bank = 34, Pin name = IO_L12N_T1_MRCC_34, Sch name = LED5 91 set_property PACKAGE_PIN T4 [get_ports {led[5]}] 92 set_property IOSTANDARD LVCMOS33 [get_ports {led[5]}] 93 ##Bank = 34, Pin name = IO_L22P_T3_34, Sch name = LED6 94 set_property PACKAGE_PIN U7 [get_ports {led[6]}] 95 set_property IOSTANDARD LVCMOS33 [get_ports {led[6]}] 96 ##Bank = 34, Pin name = IO_L22N_T3_34, Sch name = LED7 97 set_property PACKAGE_PIN U6 [get_ports {led[7]}] 98 set_property IOSTANDARD LVCMOS33 [get_ports {led[7]}] 99 ##Bank = 34, Pin name = IO_L10N_T1_34, Sch name = LED8 100 set_property PACKAGE_PIN V4 [get_ports {led[8]}] 101 set_property IOSTANDARD LVCMOS33 [get_ports {led[8]}] 102 ##Bank = 34, Pin name = IO_L8N_T1_34, Sch name = LED9 103 set_property PACKAGE_PIN U3 [get_ports {led[9]}] 104 set_property IOSTANDARD LVCMOS33 [get_ports {led[9]}] 105 ##Bank = 34, Pin name = IO_L7N_T1_34, Sch name = LED10 106 set_property PACKAGE_PIN V1 [get_ports {led[10]}] 107 set_property IOSTANDARD LVCMOS33 [get_ports {led[10]}] 108 ##Bank = 34, Pin name = IO_L17P_T2_34, Sch name = LED11 109 set_property PACKAGE_PIN R1 [get_ports {led[11]}] 110 set_property IOSTANDARD LVCMOS33 [get_ports {led[11]}] 111 ##Bank = 34, Pin name = IO_L13N_T2_MRCC_34, Sch name = LED12 112 set_property PACKAGE_PIN P5 [get_ports {led[12]}] 113 set_property IOSTANDARD LVCMOS33 [get_ports {led[12]}] 114 ##Bank = 34, Pin name = IO_L7P_T1_34, Sch name = LED13 115 set_property PACKAGE_PIN U1 [get_ports {led[13]}] 116 set_property IOSTANDARD LVCMOS33 [get_ports {led[13]}] 117 ##Bank = 34, Pin name = IO_L15N_T2_DQS_34, Sch name = LED14 118 set_property PACKAGE_PIN R2 [get_ports {led[14]}] 119 set_property IOSTANDARD LVCMOS33 [get_ports {led[14]}] 120 ##Bank = 34, Pin name = IO_L15P_T2_DQS_34, Sch name = LED15 121 set_property PACKAGE_PIN P2 [get_ports {led[15]}] 122 set_property IOSTANDARD LVCMOS33 [get_ports {led[15]}] 123 124 ##Bank = 34, Pin name = IO_L5P_T0_34, Sch name = LED16_R 125 #set_property PACKAGE_PIN K5 [get_ports RGB1_Red] 126 #set_property IOSTANDARD LVCMOS33 [get_ports RGB1_Red] 127 ##Bank = 15, Pin name = IO_L5P_T0_AD9P_15, Sch name = LED16_G 128 #set_property PACKAGE_PIN F13 [get_ports RGB1_Green] 129 #set_property IOSTANDARD LVCMOS33 [get_ports RGB1_Green] 130 ##Bank = 35, Pin name = IO_L19N_T3_VREF_35, Sch name = LED16_B 131 #set_property PACKAGE_PIN F6 [get_ports RGB1_Blue] 132 #set_property IOSTANDARD LVCMOS33 [get_ports RGB1_Blue] 133 ##Bank = 34, Pin name = IO_0_34, Sch name = LED17_R 134 #set_property PACKAGE_PIN K6 [get_ports RGB2_Red] 135 #set_property IOSTANDARD LVCMOS33 [get_ports RGB2_Red] 136 ##Bank = 35, Pin name = IO_24P_T3_35, Sch name = LED17_G 137 #set_property PACKAGE_PIN H6 [get_ports RGB2_Green] 138 #set_property IOSTANDARD LVCMOS33 [get_ports RGB2_Green] 139 ##Bank = CONFIG, Pin name = IO_L3N_T0_DQS_EMCCLK_14, Sch name = LED17_B 140 #set_property PACKAGE_PIN L16 [get_ports RGB2_Blue] 141 #set_property IOSTANDARD LVCMOS33 [get_ports RGB2_Blue] 142 143 144 145 ##7 segment display 146 ##Bank = 34, Pin name = IO_L2N_T0_34, Sch name = CA 147 #set_property PACKAGE_PIN L3 [get_ports {seg[0]}] 148 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[0]}] 149 ##Bank = 34, Pin name = IO_L3N_T0_DQS_34, Sch name = CB 150 #set_property PACKAGE_PIN N1 [get_ports {seg[1]}] 151 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[1]}] 152 ##Bank = 34, Pin name = IO_L6N_T0_VREF_34, Sch name = CC 153 #set_property PACKAGE_PIN L5 [get_ports {seg[2]}] 154 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[2]}] 155 ##Bank = 34, Pin name = IO_L5N_T0_34, Sch name = CD 156 #set_property PACKAGE_PIN L4 [get_ports {seg[3]}] 157 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[3]}] 158 ##Bank = 34, Pin name = IO_L2P_T0_34, Sch name = CE 159 #set_property PACKAGE_PIN K3 [get_ports {seg[4]}] 160 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[4]}] 161 ##Bank = 34, Pin name = IO_L4N_T0_34, Sch name = CF 162 #set_property PACKAGE_PIN M2 [get_ports {seg[5]}] 163 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[5]}] 164 ##Bank = 34, Pin name = IO_L6P_T0_34, Sch name = CG 165 #set_property PACKAGE_PIN L6 [get_ports {seg[6]}] 166 #set_property IOSTANDARD LVCMOS33 [get_ports {seg[6]}] 167 168 ##Bank = 34, Pin name = IO_L16P_T2_34, Sch name = DP 169 #set_property PACKAGE_PIN M4 [get_ports dp] 170 #set_property IOSTANDARD LVCMOS33 [get_ports dp] 171 172 ##Bank = 34, Pin name = IO_L18N_T2_34, Sch name = AN0 173 #set_property PACKAGE_PIN N6 [get_ports {an[0]}] 174 #set_property IOSTANDARD LVCMOS33 [get_ports {an[0]}] 175 ##Bank = 34, Pin name = IO_L18P_T2_34, Sch name = AN1 176 #set_property PACKAGE_PIN M6 [get_ports {an[1]}] 177 #set_property IOSTANDARD LVCMOS33 [get_ports {an[1]}] 178 ##Bank = 34, Pin name = IO_L4P_T0_34, Sch name = AN2 179 #set_property PACKAGE_PIN M3 [get_ports {an[2]}] 180 #set_property IOSTANDARD LVCMOS33 [get_ports {an[2]}] 181 ##Bank = 34, Pin name = IO_L13_T2_MRCC_34, Sch name = AN3 182 #set_property PACKAGE_PIN N5 [get_ports {an[3]}] 183 #set_property IOSTANDARD LVCMOS33 [get_ports {an[3]}] 184 ##Bank = 34, Pin name = IO_L3P_T0_DQS_34, Sch name = AN4 185 #set_property PACKAGE_PIN N2 [get_ports {an[4]}] 186 #set_property IOSTANDARD LVCMOS33 [get_ports {an[4]}] 187 ##Bank = 34, Pin name = IO_L16N_T2_34, Sch name = AN5 188 #set_property PACKAGE_PIN N4 [get_ports {an[5]}] 189 #set_property IOSTANDARD LVCMOS33 [get_ports {an[5]}] 190 ##Bank = 34, Pin name = IO_L1P_T0_34, Sch name = AN6 191 #set_property PACKAGE_PIN L1 [get_ports {an[6]}] 192 #set_property IOSTANDARD LVCMOS33 [get_ports {an[6]}] 193 ##Bank = 34, Pin name = IO_L1N_T034, Sch name = AN7 194 #set_property PACKAGE_PIN M1 [get_ports {an[7]}] 195 #set_property IOSTANDARD LVCMOS33 [get_ports {an[7]}] 196 197 198 199 ##Buttons 200 ##Bank = 15, Pin name = IO_L3P_T0_DQS_AD1P_15, Sch name = CPU_RESET 201 #set_property PACKAGE_PIN C12 [get_ports btnCpuReset] 202 #set_property IOSTANDARD LVCMOS33 [get_ports btnCpuReset] 203 ##Bank = 15, Pin name = IO_L11N_T1_SRCC_15, Sch name = BTNC 204 #set_property PACKAGE_PIN E16 [get_ports btnC] 205 #set_property IOSTANDARD LVCMOS33 [get_ports btnC] 206 ##Bank = 15, Pin name = IO_L14P_T2_SRCC_15, Sch name = BTNU 207 #set_property PACKAGE_PIN F15 [get_ports btnU] 208 #set_property IOSTANDARD LVCMOS33 [get_ports btnU] 209 ##Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14, Sch name = BTNL 210 #set_property PACKAGE_PIN T16 [get_ports btnL] 211 #set_property IOSTANDARD LVCMOS33 [get_ports btnL] 212 ##Bank = 14, Pin name = IO_25_14, Sch name = BTNR 213 #set_property PACKAGE_PIN R10 [get_ports btnR] 214 #set_property IOSTANDARD LVCMOS33 [get_ports btnR] 215 ##Bank = 14, Pin name = IO_L21P_T3_DQS_14, Sch name = BTND 216 #set_property PACKAGE_PIN V10 [get_ports btnD] 217 #set_property IOSTANDARD LVCMOS33 [get_ports btnD] 218 219 220 221 ##Pmod Header JA 222 ##Bank = 15, Pin name = IO_L1N_T0_AD0N_15, Sch name = JA1 223 #set_property PACKAGE_PIN B13 [get_ports {JA[0]}] 224 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[0]}] 225 ##Bank = 15, Pin name = IO_L5N_T0_AD9N_15, Sch name = JA2 226 #set_property PACKAGE_PIN F14 [get_ports {JA[1]}] 227 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[1]}] 228 ##Bank = 15, Pin name = IO_L16N_T2_A27_15, Sch name = JA3 229 #set_property PACKAGE_PIN D17 [get_ports {JA[2]}] 230 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[2]}] 231 ##Bank = 15, Pin name = IO_L16P_T2_A28_15, Sch name = JA4 232 #set_property PACKAGE_PIN E17 [get_ports {JA[3]}] 233 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[3]}] 234 ##Bank = 15, Pin name = IO_0_15, Sch name = JA7 235 #set_property PACKAGE_PIN G13 [get_ports {JA[4]}] 236 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[4]}] 237 ##Bank = 15, Pin name = IO_L20N_T3_A19_15, Sch name = JA8 238 #set_property PACKAGE_PIN C17 [get_ports {JA[5]}] 239 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[5]}] 240 ##Bank = 15, Pin name = IO_L21N_T3_A17_15, Sch name = JA9 241 #set_property PACKAGE_PIN D18 [get_ports {JA[6]}] 242 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[6]}] 243 ##Bank = 15, Pin name = IO_L21P_T3_DQS_15, Sch name = JA10 244 #set_property PACKAGE_PIN E18 [get_ports {JA[7]}] 245 #set_property IOSTANDARD LVCMOS33 [get_ports {JA[7]}] 246 247 248 249 ##Pmod Header JB 250 ##Bank = 15, Pin name = IO_L15N_T2_DQS_ADV_B_15, Sch name = JB1 251 #set_property PACKAGE_PIN G14 [get_ports {JB[0]}] 252 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[0]}] 253 ##Bank = 14, Pin name = IO_L13P_T2_MRCC_14, Sch name = JB2 254 #set_property PACKAGE_PIN P15 [get_ports {JB[1]}] 255 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[1]}] 256 ##Bank = 14, Pin name = IO_L21N_T3_DQS_A06_D22_14, Sch name = JB3 257 #set_property PACKAGE_PIN V11 [get_ports {JB[2]}] 258 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[2]}] 259 ##Bank = CONFIG, Pin name = IO_L16P_T2_CSI_B_14, Sch name = JB4 260 #set_property PACKAGE_PIN V15 [get_ports {JB[3]}] 261 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[3]}] 262 ##Bank = 15, Pin name = IO_25_15, Sch name = JB7 263 #set_property PACKAGE_PIN K16 [get_ports {JB[4]}] 264 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[4]}] 265 ##Bank = CONFIG, Pin name = IO_L15P_T2_DQS_RWR_B_14, Sch name = JB8 266 #set_property PACKAGE_PIN R16 [get_ports {JB[5]}] 267 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[5]}] 268 ##Bank = 14, Pin name = IO_L24P_T3_A01_D17_14, Sch name = JB9 269 #set_property PACKAGE_PIN T9 [get_ports {JB[6]}] 270 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[6]}] 271 ##Bank = 14, Pin name = IO_L19N_T3_A09_D25_VREF_14, Sch name = JB10 272 #set_property PACKAGE_PIN U11 [get_ports {JB[7]}] 273 #set_property IOSTANDARD LVCMOS33 [get_ports {JB[7]}] 274 275 276 277 ##Pmod Header JC 278 ##Bank = 35, Pin name = IO_L23P_T3_35, Sch name = JC1 279 #set_property PACKAGE_PIN K2 [get_ports {JC[0]}] 280 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[0]}] 281 ##Bank = 35, Pin name = IO_L6P_T0_35, Sch name = JC2 282 #set_property PACKAGE_PIN E7 [get_ports {JC[1]}] 283 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[1]}] 284 ##Bank = 35, Pin name = IO_L22P_T3_35, Sch name = JC3 285 #set_property PACKAGE_PIN J3 [get_ports {JC[2]}] 286 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[2]}] 287 ##Bank = 35, Pin name = IO_L21P_T3_DQS_35, Sch name = JC4 288 #set_property PACKAGE_PIN J4 [get_ports {JC[3]}] 289 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[3]}] 290 ##Bank = 35, Pin name = IO_L23N_T3_35, Sch name = JC7 291 #set_property PACKAGE_PIN K1 [get_ports {JC[4]}] 292 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[4]}] 293 ##Bank = 35, Pin name = IO_L5P_T0_AD13P_35, Sch name = JC8 294 #set_property PACKAGE_PIN E6 [get_ports {JC[5]}] 295 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[5]}] 296 ##Bank = 35, Pin name = IO_L22N_T3_35, Sch name = JC9 297 #set_property PACKAGE_PIN J2 [get_ports {JC[6]}] 298 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[6]}] 299 ##Bank = 35, Pin name = IO_L19P_T3_35, Sch name = JC10 300 #set_property PACKAGE_PIN G6 [get_ports {JC[7]}] 301 #set_property IOSTANDARD LVCMOS33 [get_ports {JC[7]}] 302 303 304 305 ##Pmod Header JD 306 ##Bank = 35, Pin name = IO_L21N_T2_DQS_35, Sch name = JD1 307 set_property PACKAGE_PIN H4 [get_ports {JD[0]}] 308 set_property IOSTANDARD LVCMOS33 [get_ports {JD[0]}] 309 ##Bank = 35, Pin name = IO_L17P_T2_35, Sch name = JD2 310 set_property PACKAGE_PIN H1 [get_ports {JD[1]}] 311 set_property IOSTANDARD LVCMOS33 [get_ports {JD[1]}] 312 ##Bank = 35, Pin name = IO_L17N_T2_35, Sch name = JD3 313 set_property PACKAGE_PIN G1 [get_ports {JD[2]}] 314 set_property IOSTANDARD LVCMOS33 [get_ports {JD[2]}] 315 ##Bank = 35, Pin name = IO_L20N_T3_35, Sch name = JD4 316 set_property PACKAGE_PIN G3 [get_ports {JD[3]}] 317 set_property IOSTANDARD LVCMOS33 [get_ports {JD[3]}] 318 ##Bank = 35, Pin name = IO_L15P_T2_DQS_35, Sch name = JD7 319 #set_property PACKAGE_PIN H2 [get_ports {JD[4]}] 320 #set_property IOSTANDARD LVCMOS33 [get_ports {JD[4]}] 321 ##Bank = 35, Pin name = IO_L20P_T3_35, Sch name = JD8 322 #set_property PACKAGE_PIN G4 [get_ports {JD[5]}] 323 #set_property IOSTANDARD LVCMOS33 [get_ports {JD[5]}] 324 ##Bank = 35, Pin name = IO_L15N_T2_DQS_35, Sch name = JD9 325 #set_property PACKAGE_PIN G2 [get_ports {JD[6]}] 326 #set_property IOSTANDARD LVCMOS33 [get_ports {JD[6]}] 327 ##Bank = 35, Pin name = IO_L13N_T2_MRCC_35, Sch name = JD10 328 #set_property PACKAGE_PIN F3 [get_ports {JD[7]}] 329 #set_property IOSTANDARD LVCMOS33 [get_ports {JD[7]}] 330 331 332 333 ##Pmod Header JXADC 334 ##Bank = 15, Pin name = IO_L9P_T1_DQS_AD3P_15, Sch name = XADC1_P -> XA1_P 335 #set_property PACKAGE_PIN A13 [get_ports {JXADC[0]}] 336 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[0]}] 337 ##Bank = 15, Pin name = IO_L8P_T1_AD10P_15, Sch name = XADC2_P -> XA2_P 338 #set_property PACKAGE_PIN A15 [get_ports {JXADC[1]}] 339 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[1]}] 340 ##Bank = 15, Pin name = IO_L7P_T1_AD2P_15, Sch name = XADC3_P -> XA3_P 341 #set_property PACKAGE_PIN B16 [get_ports {JXADC[2]}] 342 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[2]}] 343 ##Bank = 15, Pin name = IO_L10P_T1_AD11P_15, Sch name = XADC4_P -> XA4_P 344 #set_property PACKAGE_PIN B18 [get_ports {JXADC[3]}] 345 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[3]}] 346 ##Bank = 15, Pin name = IO_L9N_T1_DQS_AD3N_15, Sch name = XADC1_N -> XA1_N 347 #set_property PACKAGE_PIN A14 [get_ports {JXADC[4]}] 348 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[4]}] 349 ##Bank = 15, Pin name = IO_L8N_T1_AD10N_15, Sch name = XADC2_N -> XA2_N 350 #set_property PACKAGE_PIN A16 [get_ports {JXADC[5]}] 351 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[5]}] 352 ##Bank = 15, Pin name = IO_L7N_T1_AD2N_15, Sch name = XADC3_N -> XA3_N 353 #set_property PACKAGE_PIN B17 [get_ports {JXADC[6]}] 354 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[6]}] 355 ##Bank = 15, Pin name = IO_L10N_T1_AD11N_15, Sch name = XADC4_N -> XA4_N 356 #set_property PACKAGE_PIN A18 [get_ports {JXADC[7]}] 357 #set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[7]}] 358 359 360 361 ##VGA Connector 362 ##Bank = 35, Pin name = IO_L8N_T1_AD14N_35, Sch name = VGA_R0 363 #set_property PACKAGE_PIN A3 [get_ports {vgaRed[0]}] 364 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[0]}] 365 ##Bank = 35, Pin name = IO_L7N_T1_AD6N_35, Sch name = VGA_R1 366 #set_property PACKAGE_PIN B4 [get_ports {vgaRed[1]}] 367 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[1]}] 368 ##Bank = 35, Pin name = IO_L1N_T0_AD4N_35, Sch name = VGA_R2 369 #set_property PACKAGE_PIN C5 [get_ports {vgaRed[2]}] 370 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[2]}] 371 ##Bank = 35, Pin name = IO_L8P_T1_AD14P_35, Sch name = VGA_R3 372 #set_property PACKAGE_PIN A4 [get_ports {vgaRed[3]}] 373 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[3]}] 374 ##Bank = 35, Pin name = IO_L2P_T0_AD12P_35, Sch name = VGA_B0 375 #set_property PACKAGE_PIN B7 [get_ports {vgaBlue[0]}] 376 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[0]}] 377 ##Bank = 35, Pin name = IO_L4N_T0_35, Sch name = VGA_B1 378 #set_property PACKAGE_PIN C7 [get_ports {vgaBlue[1]}] 379 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[1]}] 380 ##Bank = 35, Pin name = IO_L6N_T0_VREF_35, Sch name = VGA_B2 381 #set_property PACKAGE_PIN D7 [get_ports {vgaBlue[2]}] 382 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[2]}] 383 ##Bank = 35, Pin name = IO_L4P_T0_35, Sch name = VGA_B3 384 #set_property PACKAGE_PIN D8 [get_ports {vgaBlue[3]}] 385 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[3]}] 386 ##Bank = 35, Pin name = IO_L1P_T0_AD4P_35, Sch name = VGA_G0 387 #set_property PACKAGE_PIN C6 [get_ports {vgaGreen[0]}] 388 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[0]}] 389 ##Bank = 35, Pin name = IO_L3N_T0_DQS_AD5N_35, Sch name = VGA_G1 390 #set_property PACKAGE_PIN A5 [get_ports {vgaGreen[1]}] 391 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[1]}] 392 ##Bank = 35, Pin name = IO_L2N_T0_AD12N_35, Sch name = VGA_G2 393 #set_property PACKAGE_PIN B6 [get_ports {vgaGreen[2]}] 394 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[2]}] 395 ##Bank = 35, Pin name = IO_L3P_T0_DQS_AD5P_35, Sch name = VGA_G3 396 #set_property PACKAGE_PIN A6 [get_ports {vgaGreen[3]}] 397 #set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[3]}] 398 ##Bank = 15, Pin name = IO_L4P_T0_15, Sch name = VGA_HS 399 #set_property PACKAGE_PIN B11 [get_ports Hsync] 400 #set_property IOSTANDARD LVCMOS33 [get_ports Hsync] 401 ##Bank = 15, Pin name = IO_L3N_T0_DQS_AD1N_15, Sch name = VGA_VS 402 #set_property PACKAGE_PIN B12 [get_ports Vsync] 403 #set_property IOSTANDARD LVCMOS33 [get_ports Vsync] 404 405 406 407 ##Micro SD Connector 408 ##Bank = 35, Pin name = IO_L14P_T2_SRCC_35, Sch name = SD_RESET 409 #set_property PACKAGE_PIN E2 [get_ports sdReset] 410 #set_property IOSTANDARD LVCMOS33 [get_ports sdReset] 411 ##Bank = 35, Pin name = IO_L9N_T1_DQS_AD7N_35, Sch name = SD_CD 412 #set_property PACKAGE_PIN A1 [get_ports sdCD] 413 #set_property IOSTANDARD LVCMOS33 [get_ports sdCD] 414 ##Bank = 35, Pin name = IO_L9P_T1_DQS_AD7P_35, Sch name = SD_SCK 415 #set_property PACKAGE_PIN B1 [get_ports sdSCK] 416 #set_property IOSTANDARD LVCMOS33 [get_ports sdSCK] 417 ##Bank = 35, Pin name = IO_L16N_T2_35, Sch name = SD_CMD 418 #set_property PACKAGE_PIN C1 [get_ports sdCmd] 419 #set_property IOSTANDARD LVCMOS33 [get_ports sdCmd] 420 ##Bank = 35, Pin name = IO_L16P_T2_35, Sch name = SD_DAT0 421 #set_property PACKAGE_PIN C2 [get_ports {sdData[0]}] 422 #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[0]}] 423 ##Bank = 35, Pin name = IO_L18N_T2_35, Sch name = SD_DAT1 424 #set_property PACKAGE_PIN E1 [get_ports {sdData[1]}] 425 #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[1]}] 426 ##Bank = 35, Pin name = IO_L18P_T2_35, Sch name = SD_DAT2 427 #set_property PACKAGE_PIN F1 [get_ports {sdData[2]}] 428 #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[2]}] 429 ##Bank = 35, Pin name = IO_L14N_T2_SRCC_35, Sch name = SD_DAT3 430 #set_property PACKAGE_PIN D2 [get_ports {sdData[3]}] 431 #set_property IOSTANDARD LVCMOS33 [get_ports {sdData[3]}] 432 433 434 435 ##Accelerometer 436 ##Bank = 15, Pin name = IO_L6N_T0_VREF_15, Sch name = ACL_MISO 437 #set_property PACKAGE_PIN D13 [get_ports aclMISO] 438 #set_property IOSTANDARD LVCMOS33 [get_ports aclMISO] 439 ##Bank = 15, Pin name = IO_L2N_T0_AD8N_15, Sch name = ACL_MOSI 440 #set_property PACKAGE_PIN B14 [get_ports aclMOSI] 441 #set_property IOSTANDARD LVCMOS33 [get_ports aclMOSI] 442 ##Bank = 15, Pin name = IO_L12P_T1_MRCC_15, Sch name = ACL_SCLK 443 #set_property PACKAGE_PIN D15 [get_ports aclSCK] 444 #set_property IOSTANDARD LVCMOS33 [get_ports aclSCK] 445 ##Bank = 15, Pin name = IO_L12N_T1_MRCC_15, Sch name = ACL_CSN 446 #set_property PACKAGE_PIN C15 [get_ports aclSS] 447 #set_property IOSTANDARD LVCMOS33 [get_ports aclSS] 448 ##Bank = 15, Pin name = IO_L20P_T3_A20_15, Sch name = ACL_INT1 449 #set_property PACKAGE_PIN C16 [get_ports aclInt1] 450 #set_property IOSTANDARD LVCMOS33 [get_ports aclInt1] 451 ##Bank = 15, Pin name = IO_L11P_T1_SRCC_15, Sch name = ACL_INT2 452 #set_property PACKAGE_PIN E15 [get_ports aclInt2] 453 #set_property IOSTANDARD LVCMOS33 [get_ports aclInt2] 454 455 456 457 ##Temperature Sensor 458 ##Bank = 15, Pin name = IO_L14N_T2_SRCC_15, Sch name = TMP_SCL 459 #set_property PACKAGE_PIN F16 [get_ports tmpSCL] 460 #set_property IOSTANDARD LVCMOS33 [get_ports tmpSCL] 461 ##Bank = 15, Pin name = IO_L13N_T2_MRCC_15, Sch name = TMP_SDA 462 #set_property PACKAGE_PIN G16 [get_ports tmpSDA] 463 #set_property IOSTANDARD LVCMOS33 [get_ports tmpSDA] 464 ##Bank = 15, Pin name = IO_L1P_T0_AD0P_15, Sch name = TMP_INT 465 #set_property PACKAGE_PIN D14 [get_ports tmpInt] 466 #set_property IOSTANDARD LVCMOS33 [get_ports tmpInt] 467 ##Bank = 15, Pin name = IO_L1N_T0_AD0N_15, Sch name = TMP_CT 468 #set_property PACKAGE_PIN C14 [get_ports tmpCT] 469 #set_property IOSTANDARD LVCMOS33 [get_ports tmpCT] 470 471 472 473 ##Omnidirectional Microphone 474 ##Bank = 35, Pin name = IO_25_35, Sch name = M_CLK 475 #set_property PACKAGE_PIN J5 [get_ports micClk] 476 #set_property IOSTANDARD LVCMOS33 [get_ports micClk] 477 ##Bank = 35, Pin name = IO_L24N_T3_35, Sch name = M_DATA 478 #set_property PACKAGE_PIN H5 [get_ports micData] 479 #set_property IOSTANDARD LVCMOS33 [get_ports micData] 480 ##Bank = 35, Pin name = IO_0_35, Sch name = M_LRSEL 481 #set_property PACKAGE_PIN F5 [get_ports micLRSel] 482 #set_property IOSTANDARD LVCMOS33 [get_ports micLRSel] 483 484 485 486 ##PWM Audio Amplifier 487 ##Bank = 15, Pin name = IO_L4N_T0_15, Sch name = AUD_PWM 488 #set_property PACKAGE_PIN A11 [get_ports ampPWM] 489 #set_property IOSTANDARD LVCMOS33 [get_ports ampPWM] 490 ##Bank = 15, Pin name = IO_L6P_T0_15, Sch name = AUD_SD 491 #set_property PACKAGE_PIN D12 [get_ports ampSD] 492 #set_property IOSTANDARD LVCMOS33 [get_ports ampSD] 493 494 495 ##USB-RS232 Interface 496 ##Bank = 35, Pin name = IO_L7P_T1_AD6P_35, Sch name = UART_TXD_IN 497 #set_property PACKAGE_PIN C4 [get_ports RsRx] 498 #set_property IOSTANDARD LVCMOS33 [get_ports RsRx] 499 ##Bank = 35, Pin name = IO_L11N_T1_SRCC_35, Sch name = UART_RXD_OUT 500 #set_property PACKAGE_PIN D4 [get_ports RsTx] 501 #set_property IOSTANDARD LVCMOS33 [get_ports RsTx] 502 ##Bank = 35, Pin name = IO_L12N_T1_MRCC_35, Sch name = UART_CTS 503 #set_property PACKAGE_PIN D3 [get_ports RsCts] 504 #set_property IOSTANDARD LVCMOS33 [get_ports RsCts] 505 ##Bank = 35, Pin name = IO_L5N_T0_AD13N_35, Sch name = UART_RTS 506 #set_property PACKAGE_PIN E5 [get_ports RsRts] 507 #set_property IOSTANDARD LVCMOS33 [get_ports RsRts] 508 509 510 511 ##USB HID (PS/2) 512 ##Bank = 35, Pin name = IO_L13P_T2_MRCC_35, Sch name = PS2_CLK 513 #set_property PACKAGE_PIN F4 [get_ports PS2Clk] 514 #set_property IOSTANDARD LVCMOS33 [get_ports PS2Clk] 515 #set_property PULLUP true [get_ports PS2Clk] 516 ##Bank = 35, Pin name = IO_L10N_T1_AD15N_35, Sch name = PS2_DATA 517 #set_property PACKAGE_PIN B2 [get_ports PS2Data] 518 #set_property IOSTANDARD LVCMOS33 [get_ports PS2Data] 519 #set_property PULLUP true [get_ports PS2Data] 520 521 522 523 ##SMSC Ethernet PHY 524 ##Bank = 16, Pin name = IO_L11P_T1_SRCC_16, Sch name = ETH_MDC 525 set_property PACKAGE_PIN C9 [get_ports phy0_mdc] 526 set_property IOSTANDARD LVCMOS33 [get_ports phy0_mdc] 527 ##Bank = 16, Pin name = IO_L14N_T2_SRCC_16, Sch name = ETH_MDIO 528 set_property PACKAGE_PIN A9 [get_ports phy0_mdio] 529 set_property IOSTANDARD LVCMOS33 [get_ports phy0_mdio] 530 ##Bank = 35, Pin name = IO_L10P_T1_AD15P_35, Sch name = ETH_RSTN 531 set_property PACKAGE_PIN B3 [get_ports phy0_rstn] 532 set_property IOSTANDARD LVCMOS33 [get_ports phy0_rstn] 533 ##Bank = 16, Pin name = IO_L6N_T0_VREF_16, Sch name = ETH_CRSDV 534 set_property PACKAGE_PIN D9 [get_ports phy0_crs] 535 set_property IOSTANDARD LVCMOS33 [get_ports phy0_crs] 536 ##Bank = 16, Pin name = IO_L13N_T2_MRCC_16, Sch name = ETH_RXERR 537 set_property PACKAGE_PIN C10 [get_ports phy0_rxerr] 538 set_property IOSTANDARD LVCMOS33 [get_ports phy0_rxerr] 539 ##Bank = 16, Pin name = IO_L19N_T3_VREF_16, Sch name = ETH_RXD0 540 set_property PACKAGE_PIN D10 [get_ports {phy0_rx[0]}] 541 set_property IOSTANDARD LVCMOS33 [get_ports {phy0_rx[0]}] 542 ##Bank = 16, Pin name = IO_L13P_T2_MRCC_16, Sch name = ETH_RXD1 543 set_property PACKAGE_PIN C11 [get_ports {phy0_rx[1]}] 544 set_property IOSTANDARD LVCMOS33 [get_ports {phy0_rx[1]}] 545 ##Bank = 16, Pin name = IO_L11N_T1_SRCC_16, Sch name = ETH_TXEN 546 set_property PACKAGE_PIN B9 [get_ports phy0_txen] 547 set_property IOSTANDARD LVCMOS33 [get_ports phy0_txen] 548 ##Bank = 16, Pin name = IO_L14P_T2_SRCC_16, Sch name = ETH_TXD0 549 set_property PACKAGE_PIN A10 [get_ports {phy0_tx[0]}] 550 set_property IOSTANDARD LVCMOS33 [get_ports {phy0_tx[0]}] 551 ##Bank = 16, Pin name = IO_L12N_T1_MRCC_16, Sch name = ETH_TXD1 552 set_property PACKAGE_PIN A8 [get_ports {phy0_tx[1]}] 553 set_property IOSTANDARD LVCMOS33 [get_ports {phy0_tx[1]}] 554 ##Bank = 35, Pin name = IO_L11P_T1_SRCC_35, Sch name = ETH_REFCLK 555 set_property PACKAGE_PIN D5 [get_ports phy0_clk] 556 set_property IOSTANDARD LVCMOS33 [get_ports phy0_clk] 557 ##Bank = 16, Pin name = IO_L12P_T1_MRCC_16, Sch name = ETH_INTN 558 set_property PACKAGE_PIN B8 [get_ports phy0_intn] 559 set_property IOSTANDARD LVCMOS33 [get_ports phy0_intn] 560 561 562 563 ##Quad SPI Flash 564 ##Bank = CONFIG, Pin name = CCLK_0, Sch name = QSPI_SCK 565 #set_property PACKAGE_PIN E9 [get_ports {QspiSCK}] 566 #set_property IOSTANDARD LVCMOS33 [get_ports {QspiSCK}] 567 ##Bank = CONFIG, Pin name = IO_L1P_T0_D00_MOSI_14, Sch name = QSPI_DQ0 568 #set_property PACKAGE_PIN K17 [get_ports {QspiDB[0]}] 569 #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[0]}] 570 ##Bank = CONFIG, Pin name = IO_L1N_T0_D01_DIN_14, Sch name = QSPI_DQ1 571 #set_property PACKAGE_PIN K18 [get_ports {QspiDB[1]}] 572 #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[1]}] 573 ##Bank = CONFIG, Pin name = IO_L20_T0_D02_14, Sch name = QSPI_DQ2 574 #set_property PACKAGE_PIN L14 [get_ports {QspiDB[2]}] 575 #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[2]}] 576 ##Bank = CONFIG, Pin name = IO_L2P_T0_D03_14, Sch name = QSPI_DQ3 577 #set_property PACKAGE_PIN M14 [get_ports {QspiDB[3]}] 578 #set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[3]}] 579 ##Bank = CONFIG, Pin name = IO_L15N_T2_DQS_DOUT_CSO_B_14, Sch name = QSPI_CSN 580 #set_property PACKAGE_PIN L13 [get_ports QspiCSn] 581 #set_property IOSTANDARD LVCMOS33 [get_ports QspiCSn] 582 583 584 585 ##Cellular RAM 586 ##Bank = 14, Pin name = IO_L14N_T2_SRCC_14, Sch name = CRAM_CLK 587 #set_property PACKAGE_PIN T15 [get_ports RamCLK] 588 #set_property IOSTANDARD LVCMOS33 [get_ports RamCLK] 589 ##Bank = 14, Pin name = IO_L23P_T3_A03_D19_14, Sch name = CRAM_ADVN 590 #set_property PACKAGE_PIN T13 [get_ports RamADVn] 591 #set_property IOSTANDARD LVCMOS33 [get_ports RamADVn] 592 ##Bank = 14, Pin name = IO_L4P_T0_D04_14, Sch name = CRAM_CEN 593 #set_property PACKAGE_PIN L18 [get_ports RamCEn] 594 #set_property IOSTANDARD LVCMOS33 [get_ports RamCEn] 595 ##Bank = 15, Pin name = IO_L19P_T3_A22_15, Sch name = CRAM_CRE 596 #set_property PACKAGE_PIN J14 [get_ports RamCRE] 597 #set_property IOSTANDARD LVCMOS33 [get_ports RamCRE] 598 ##Bank = 15, Pin name = IO_L15P_T2_DQS_15, Sch name = CRAM_OEN 599 #set_property PACKAGE_PIN H14 [get_ports RamOEn] 600 #set_property IOSTANDARD LVCMOS33 [get_ports RamOEn] 601 ##Bank = 14, Pin name = IO_0_14, Sch name = CRAM_WEN 602 #set_property PACKAGE_PIN R11 [get_ports RamWEn] 603 #set_property IOSTANDARD LVCMOS33 [get_ports RamWEn] 604 ##Bank = 15, Pin name = IO_L24N_T3_RS0_15, Sch name = CRAM_LBN 605 #set_property PACKAGE_PIN J15 [get_ports RamLBn] 606 #set_property IOSTANDARD LVCMOS33 [get_ports RamLBn] 607 ##Bank = 15, Pin name = IO_L17N_T2_A25_15, Sch name = CRAM_UBN 608 #set_property PACKAGE_PIN J13 [get_ports RamUBn] 609 #set_property IOSTANDARD LVCMOS33 [get_ports RamUBn] 610 ##Bank = 14, Pin name = IO_L14P_T2_SRCC_14, Sch name = CRAM_WAIT 611 #set_property PACKAGE_PIN T14 [get_ports RamWait] 612 #set_property IOSTANDARD LVCMOS33 [get_ports RamWait] 613 614 ##Bank = 14, Pin name = IO_L5P_T0_DQ06_14, Sch name = CRAM_DQ0 615 #set_property PACKAGE_PIN R12 [get_ports {MemDB[0]}] 616 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[0]}] 617 ##Bank = 14, Pin name = IO_L19P_T3_A10_D26_14, Sch name = CRAM_DQ1 618 #set_property PACKAGE_PIN T11 [get_ports {MemDB[1]}] 619 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[1]}] 620 ##Bank = 14, Pin name = IO_L20P_T3_A08)D24_14, Sch name = CRAM_DQ2 621 #set_property PACKAGE_PIN U12 [get_ports {MemDB[2]}] 622 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[2]}] 623 ##Bank = 14, Pin name = IO_L5N_T0_D07_14, Sch name = CRAM_DQ3 624 #set_property PACKAGE_PIN R13 [get_ports {MemDB[3]}] 625 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[3]}] 626 ##Bank = 14, Pin name = IO_L17N_T2_A13_D29_14, Sch name = CRAM_DQ4 627 #set_property PACKAGE_PIN U18 [get_ports {MemDB[4]}] 628 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[4]}] 629 ##Bank = 14, Pin name = IO_L12N_T1_MRCC_14, Sch name = CRAM_DQ5 630 #set_property PACKAGE_PIN R17 [get_ports {MemDB[5]}] 631 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[5]}] 632 ##Bank = 14, Pin name = IO_L7N_T1_D10_14, Sch name = CRAM_DQ6 633 #set_property PACKAGE_PIN T18 [get_ports {MemDB[6]}] 634 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[6]}] 635 ##Bank = 14, Pin name = IO_L7P_T1_D09_14, Sch name = CRAM_DQ7 636 #set_property PACKAGE_PIN R18 [get_ports {MemDB[7]}] 637 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[7]}] 638 ##Bank = 15, Pin name = IO_L22N_T3_A16_15, Sch name = CRAM_DQ8 639 #set_property PACKAGE_PIN F18 [get_ports {MemDB[8]}] 640 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[8]}] 641 ##Bank = 15, Pin name = IO_L22P_T3_A17_15, Sch name = CRAM_DQ9 642 #set_property PACKAGE_PIN G18 [get_ports {MemDB[9]}] 643 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[9]}] 644 ##Bank = 15, Pin name = IO_IO_L18N_T2_A23_15, Sch name = CRAM_DQ10 645 #set_property PACKAGE_PIN G17 [get_ports {MemDB[10]}] 646 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[10]}] 647 ##Bank = 14, Pin name = IO_L4N_T0_D05_14, Sch name = CRAM_DQ11 648 #set_property PACKAGE_PIN M18 [get_ports {MemDB[11]}] 649 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[11]}] 650 ##Bank = 14, Pin name = IO_L10N_T1_D15_14, Sch name = CRAM_DQ12 651 #set_property PACKAGE_PIN M17 [get_ports {MemDB[12]}] 652 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[12]}] 653 ##Bank = 14, Pin name = IO_L9N_T1_DQS_D13_14, Sch name = CRAM_DQ13 654 #set_property PACKAGE_PIN P18 [get_ports {MemDB[13]}] 655 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[13]}] 656 ##Bank = 14, Pin name = IO_L9P_T1_DQS_14, Sch name = CRAM_DQ14 657 #set_property PACKAGE_PIN N17 [get_ports {MemDB[14]}] 658 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[14]}] 659 ##Bank = 14, Pin name = IO_L12P_T1_MRCC_14, Sch name = CRAM_DQ15 660 #set_property PACKAGE_PIN P17 [get_ports {MemDB[15]}] 661 #set_property IOSTANDARD LVCMOS33 [get_ports {MemDB[15]}] 662 663 ##Bank = 15, Pin name = IO_L23N_T3_FWE_B_15, Sch name = CRAM_A0 664 #set_property PACKAGE_PIN J18 [get_ports {MemAdr[0]}] 665 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[0]}] 666 ##Bank = 15, Pin name = IO_L18P_T2_A24_15, Sch name = CRAM_A1 667 #set_property PACKAGE_PIN H17 [get_ports {MemAdr[1]}] 668 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[1]}] 669 ##Bank = 15, Pin name = IO_L19N_T3_A21_VREF_15, Sch name = CRAM_A2 670 #set_property PACKAGE_PIN H15 [get_ports {MemAdr[2]}] 671 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[2]}] 672 ##Bank = 15, Pin name = IO_L23P_T3_FOE_B_15, Sch name = CRAM_A3 673 #set_property PACKAGE_PIN J17 [get_ports {MemAdr[3]}] 674 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[3]}] 675 ##Bank = 15, Pin name = IO_L13P_T2_MRCC_15, Sch name = CRAM_A4 676 #set_property PACKAGE_PIN H16 [get_ports {MemAdr[4]}] 677 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[4]}] 678 ##Bank = 15, Pin name = IO_L24P_T3_RS1_15, Sch name = CRAM_A5 679 #set_property PACKAGE_PIN K15 [get_ports {MemAdr[5]}] 680 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[5]}] 681 ##Bank = 15, Pin name = IO_L17P_T2_A26_15, Sch name = CRAM_A6 682 #set_property PACKAGE_PIN K13 [get_ports {MemAdr[6]}] 683 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[6]}] 684 ##Bank = 14, Pin name = IO_L11P_T1_SRCC_14, Sch name = CRAM_A7 685 #set_property PACKAGE_PIN N15 [get_ports {MemAdr[7]}] 686 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[7]}] 687 ##Bank = 14, Pin name = IO_L16N_T2_SRCC-14, Sch name = CRAM_A8 688 #set_property PACKAGE_PIN V16 [get_ports {MemAdr[8]}] 689 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[8]}] 690 ##Bank = 14, Pin name = IO_L22P_T3_A05_D21_14, Sch name = CRAM_A9 691 #set_property PACKAGE_PIN U14 [get_ports {MemAdr[9]}] 692 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[9]}] 693 ##Bank = 14, Pin name = IO_L22N_T3_A04_D20_14, Sch name = CRAM_A10 694 #set_property PACKAGE_PIN V14 [get_ports {MemAdr[10]}] 695 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[10]}] 696 ##Bank = 14, Pin name = IO_L20N_T3_A07_D23_14, Sch name = CRAM_A11 697 #set_property PACKAGE_PIN V12 [get_ports {MemAdr[11]}] 698 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[11]}] 699 ##Bank = 14, Pin name = IO_L8N_T1_D12_14, Sch name = CRAM_A12 700 #set_property PACKAGE_PIN P14 [get_ports {MemAdr[12]}] 701 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[12]}] 702 ##Bank = 14, Pin name = IO_L18P_T2_A12_D28_14, Sch name = CRAM_A13 703 #set_property PACKAGE_PIN U16 [get_ports {MemAdr[13]}] 704 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[13]}] 705 ##Bank = 14, Pin name = IO_L13N_T2_MRCC_14, Sch name = CRAM_A14 706 #set_property PACKAGE_PIN R15 [get_ports {MemAdr[14]}] 707 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[14]}] 708 ##Bank = 14, Pin name = IO_L8P_T1_D11_14, Sch name = CRAM_A15 709 #set_property PACKAGE_PIN N14 [get_ports {MemAdr[15]}] 710 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[15]}] 711 ##Bank = 14, Pin name = IO_L11N_T1_SRCC_14, Sch name = CRAM_A16 712 #set_property PACKAGE_PIN N16 [get_ports {MemAdr[16]}] 713 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[16]}] 714 ##Bank = 14, Pin name = IO_L6N_T0_D08_VREF_14, Sch name = CRAM_A17 715 #set_property PACKAGE_PIN M13 [get_ports {MemAdr[17]}] 716 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[17]}] 717 ##Bank = 14, Pin name = IO_L18N_T2_A11_D27_14, Sch name = CRAM_A18 718 #set_property PACKAGE_PIN V17 [get_ports {MemAdr[18]}] 719 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[18]}] 720 ##Bank = 14, Pin name = IO_L17P_T2_A14_D30_14, Sch name = CRAM_A19 721 #set_property PACKAGE_PIN U17 [get_ports {MemAdr[19]}] 722 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[19]}] 723 ##Bank = 14, Pin name = IO_L24N_T3_A00_D16_14, Sch name = CRAM_A20 724 #set_property PACKAGE_PIN T10 [get_ports {MemAdr[20]}] 725 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[20]}] 726 ##Bank = 14, Pin name = IO_L10P_T1_D14_14, Sch name = CRAM_A21 727 #set_property PACKAGE_PIN M16 [get_ports {MemAdr[21]}] 728 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[21]}] 729 ##Bank = 14, Pin name = IO_L23N_T3_A02_D18_14, Sch name = CRAM_A22 730 #set_property PACKAGE_PIN U13 [get_ports {MemAdr[22]}] 731 #set_property IOSTANDARD LVCMOS33 [get_ports {MemAdr[22]}] 732