uzed_simple_io.sv (1433B)
1 // Copyright 2014 Brian Swetland <swetland@frotz.net> 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 `timescale 1ns / 1ps 16 17 module top( 18 ); 19 20 axi_ifc #(.IWIDTH(12),.AXI3(1)) axi_ctl(); 21 22 wire fclk; 23 wire axiclk = fclk; 24 25 zynq_ps7 zynq( 26 .fclk0(fclk), 27 .m_axi_gp0_clk(axiclk), 28 .m_axi_gp0(axi_ctl) 29 ); 30 31 reg [31:0]dbg_reg = 32'haabbccdd; 32 33 wire [31:0]wdata; 34 reg [31:0]rdata; 35 wire [1:0]wreg; 36 wire [1:0]rreg; 37 wire wr; 38 wire rd; 39 40 axi_registers regs( 41 .clk(axiclk), 42 .s(axi_ctl), 43 .o_rreg(rreg), 44 .o_wreg(wreg), 45 .i_rdata(rdata), 46 .o_wdata(wdata), 47 .o_rd(rd), 48 .o_wr(wr) 49 ); 50 51 always_comb begin 52 case (rreg) 53 0: rdata = 0; 54 1: rdata = 0; 55 2: rdata = dbg_reg; 56 3: rdata = 32'h12345678; 57 endcase 58 end 59 60 always_ff @(posedge axiclk) begin 61 if (wr) begin 62 case (wreg) 63 0: ; 64 1: ; 65 2: dbg_reg <= wdata; 66 3: ; 67 endcase 68 end 69 end 70 71 endmodule 72 73 // vim: set noexpandtab: