zynq-sandbox

old FPGA projects for ZYNQ
git clone http://frotz.net/git/zynq-sandbox.git
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zybo-fclk-100m.xdc (115B)

      1 
      2 create_clock -name clk_fpga_0 -period "10.00" [get_pins "zynq/ps7_i/FCLKCLK[0]"]
      3 set_input_jitter clk_fpga_0 0.3
      4