zybo_hdmi.xdc (1321B)
1 ##Clock signal 2 ##IO_L11P_T1_SRCC_35 3 set_property PACKAGE_PIN L16 [get_ports clk] 4 set_property IOSTANDARD LVCMOS33 [get_ports clk] 5 create_clock -add -name sys_clk_pin -period 8.00 -waveform {0 4} [get_ports clk] 6 7 ##HDMI Signals 8 ##IO_L13N_T2_MRCC_35 9 set_property PACKAGE_PIN H17 [get_ports hdmi_clk_n] 10 set_property IOSTANDARD TMDS_33 [get_ports hdmi_clk_n] 11 12 ##IO_L13P_T2_MRCC_35 13 set_property PACKAGE_PIN H16 [get_ports hdmi_clk_p] 14 set_property IOSTANDARD TMDS_33 [get_ports hdmi_clk_p] 15 16 ##IO_L4N_T0_35 17 set_property PACKAGE_PIN D20 [get_ports {hdmi_d_n[0]}] 18 set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d_n[0]}] 19 20 ##IO_L4P_T0_35 21 set_property PACKAGE_PIN D19 [get_ports {hdmi_d_p[0]}] 22 set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d_p[0]}] 23 24 ##IO_L1N_T0_AD0N_35 25 set_property PACKAGE_PIN B20 [get_ports {hdmi_d_n[1]}] 26 set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d_n[1]}] 27 28 ##IO_L1P_T0_AD0P_35 29 set_property PACKAGE_PIN C20 [get_ports {hdmi_d_p[1]}] 30 set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d_p[1]}] 31 32 ##IO_L2N_T0_AD8N_35 33 set_property PACKAGE_PIN A20 [get_ports {hdmi_d_n[2]}] 34 set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d_n[2]}] 35 36 ##IO_L2P_T0_AD8P_35 37 set_property PACKAGE_PIN B19 [get_ports {hdmi_d_p[2]}] 38 set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d_p[2]}] 39 40