cpu32

commit 69de38605fe8dd41567a9adb9f136cd9656376b3
parent bef1aae9ade1dec391fc207a0cddfb44afb47490
Author: Brian Swetland <swetland@frotz.net>
Date:   Sun,  5 Feb 2012 10:38:58 -0800

test infrastructure

- start writing some unit tests for the CPU
- provide tests infrastructure (make tests) to run the testbench and
  compare against known good traces

Diffstat:
M
Makefile
 | 
10
++++++++++
D
rom.s
 | 
29
-----------------------------
A
runtest.sh
 | 
38
++++++++++++++++++++++++++++++++++++++
A
tests/0000-nothing.s
 | 
2
++
A
tests/0000-nothing.s.gold
 | 
2
++
A
tests/0010-load-imm.s
 | 
18
++++++++++++++++++
A
tests/0010-load-imm.s.gold
 | 
11
+++++++++++

7 files changed, 81 insertions(+), 29 deletions(-)
diff --git a/Makefile b/Makefile
@@ -7,6 +7,9 @@ SRC += verilog/library.v
 
 all: a32 testbench
 
+TESTS := $(wildcard tests/*.s)
+RESULTS := $(TESTS:.s=.s.pass)
+
 testbench: $(SRC) rom.txt
 	iverilog -o testbench $(SRC)
 
@@ -18,3 +21,10 @@ a32: a32.c
 
 clean::
 	rm -f testbench testbench.vcd a32 rom.txt
+	rm -rf tests/*.out tests/*.txt tests/*.trace tests/*.pass
+
+tests/%.s.pass: tests/%.s
+	@./runtest.sh $<
+	@touch $@
+
+tests:: a32 testbench $(RESULTS)
diff --git a/rom.s b/rom.s
@@ -1,29 +0,0 @@
-NOP
-
-MOV R0, 5 
-repeat:
-SUB R0, R0, 1
-BNZ R0, repeat
-
-B .
-
-NOP
-MOV R0, 0x5038
-MHI R14, 0x7777
-MOV R14, 0
-SW R0, [R14, 0x10]
-MOV R15, 0x2222
-NOP
-
-MOV R15, 0xFFD20000
-MOV R0, 0
-bigloop:
-MOV R1, 65536
-loop:
-SUB R1, R1, 1
-BNZ R1, loop
-SW R0, [R15]
-ADD R0, R0, 1
-B bigloop
-
-
diff --git a/runtest.sh b/runtest.sh
@@ -0,0 +1,38 @@
+#!/bin/sh
+
+if ./a32 $1 $1.txt ; then
+	echo OKAY: ASSEMBLED $1
+else
+	echo FAIL: ERROR ASSEMBLING $1
+	exit 1
+fi
+
+if vvp testbench +ROM=$1.txt > $1.out ; then
+	echo OKAY: EXECUTED $1
+else
+	echo FAIL: ERROR EXECUTING $1
+	exit 1
+fi
+
+grep '^PC> ' $1.out > $1.trace
+
+if [ ! -f $1.gold ] ; then
+	cp $1.trace $1.gold
+	echo "---- ---- ---- ---- ---- ---- ---- ---- ----"
+	cat $1.txt
+	echo "---- ---- ---- ---- ---- ---- ---- ---- ----"
+	cat $1.gold
+	echo "---- ---- ---- ---- ---- ---- ---- ---- ----"
+	echo FAIL: MISSING GOLDEN MASTER $1.gold
+	echo FAIL: PLEASE INSPECT THE TRACE ABOVE
+	exit 1
+fi
+
+if diff $1.trace $1.gold ; then
+	echo OKAY: VERIFIED $1
+else
+	echo FAIL: VERIFICATION FAILED $1
+	exit 1
+fi
+
+exit 0
diff --git a/tests/0000-nothing.s b/tests/0000-nothing.s
@@ -0,0 +1,2 @@
+mov r0, 0
+word 0xffffffff
diff --git a/tests/0000-nothing.s.gold b/tests/0000-nothing.s.gold
@@ -0,0 +1,2 @@
+PC> 00000000 I> 1e000000  R> xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> EXIT
diff --git a/tests/0010-load-imm.s b/tests/0010-load-imm.s
@@ -0,0 +1,18 @@
+NOP
+load_zero:
+MOV R0, 0
+load_F0000000:
+MOV R0, 0xF0000000
+load_12345678:
+MOV R0, 0x12345678
+load_FFFFFFFF:
+MOV R0, 0xFFFFFFFF
+load_0000FFFF:
+MOV R0, 0xFFFF
+load_00000020:
+MOV R0, 32
+load_00042000:
+MOV R0, 0x00042000
+
+success:
+WORD 0xFFFFFFFF
diff --git a/tests/0010-load-imm.s.gold b/tests/0010-load-imm.s.gold
@@ -0,0 +1,11 @@
+PC> 00000000 I> 00000000  R> xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000004 I> 1e000000  R> xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000008 I> 1f00f000  R> 00000000 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 0000000c I> 1f001234  R> f0000000 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000010 I> 10005678  R> 12340000 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000014 I> 1e00ffff  R> 12345678 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000018 I> 1b00ffff  R> ffffffff xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 0000001c I> 1e000020  R> 0000ffff xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000020 I> 1f000004  R> 00000020 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> 00000024 I> 10002000  R> 00040000 xxxxxxxx xxxxxxxx xxxxxxxx xxxxxxxx
+PC> EXIT