commit 9ab30383e1761fa0d0d969050000d13eaceaa666
parent 0f8a33c12038f8491d6d3b4875c6422740111767
Author: Brian Swetland <swetland@frotz.net>
Date: Thu, 9 Feb 2012 20:48:58 -0800
de0nano: clean up qsf file (bad newlines, etc)
Diffstat:
| M | de0nano/de0nano.qsf | | | 95 | +++++++++++++++++++++++++++++++++++++++---------------------------------------- |
1 file changed, 47 insertions(+), 48 deletions(-)
diff --git a/de0nano/de0nano.qsf b/de0nano/de0nano.qsf
@@ -1,10 +1,10 @@
-#============================================================
-# Build by Terasic System Builder
-#============================================================
-
+#============================================================
+# Build by Terasic System Builder
+#============================================================
+
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE22F17C6
-set_global_assignment -name TOP_LEVEL_ENTITY "de0nano"
+set_global_assignment -name TOP_LEVEL_ENTITY "de0nano"
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 10.1
set_global_assignment -name LAST_QUARTUS_VERSION 11.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "18:10:22 FEBRUARY 03,2012"
@@ -12,16 +12,16 @@ set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 256
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
-
-#============================================================
-# CLOCK
-#============================================================
+
+#============================================================
+# CLOCK
+#============================================================
set_location_assignment PIN_R8 -to CLOCK_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
-
-#============================================================
-# LED
-#============================================================
+
+#============================================================
+# LED
+#============================================================
set_location_assignment PIN_A15 -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_location_assignment PIN_A13 -to LED[1]
@@ -38,18 +38,18 @@ set_location_assignment PIN_B1 -to LED[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
set_location_assignment PIN_L3 -to LED[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
-
-#============================================================
-# KEY
-#============================================================
+
+#============================================================
+# KEY
+#============================================================
set_location_assignment PIN_J15 -to KEY[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
set_location_assignment PIN_E1 -to KEY[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
-
-#============================================================
-# SW
-#============================================================
+
+#============================================================
+# SW
+#============================================================
set_location_assignment PIN_M1 -to SW[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
set_location_assignment PIN_T8 -to SW[1]
@@ -58,10 +58,10 @@ set_location_assignment PIN_B9 -to SW[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
set_location_assignment PIN_M15 -to SW[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
-
-#============================================================
-# SDRAM
-#============================================================
+
+#============================================================
+# SDRAM
+#============================================================
set_location_assignment PIN_M7 -to DRAM_BA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0]
set_location_assignment PIN_M6 -to DRAM_BA[1]
@@ -140,18 +140,18 @@ set_location_assignment PIN_N1 -to DRAM_ADDR[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11]
set_location_assignment PIN_L4 -to DRAM_ADDR[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12]
-
-#============================================================
-# EEPROM
-#============================================================
+
+#============================================================
+# EEPROM
+#============================================================
set_location_assignment PIN_F2 -to I2C_SCLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SCLK
set_location_assignment PIN_F1 -to I2C_SDAT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to I2C_SDAT
-
-#============================================================
-# 2x13 GPIO Header
-#============================================================
+
+#============================================================
+# 2x13 GPIO Header
+#============================================================
set_location_assignment PIN_A14 -to GPIO_2[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2[0]
set_location_assignment PIN_B16 -to GPIO_2[1]
@@ -184,12 +184,11 @@ set_location_assignment PIN_E16 -to GPIO_2_IN[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[1]
set_location_assignment PIN_M16 -to GPIO_2_IN[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_2_IN[2]
-
-# A few GPIOS on JP1
+
+# A few GPIOS on JP1
set_location_assignment PIN_D3 -to GPIO_A[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_A[0]
set_location_assignment PIN_C3 -to GPIO_A[1]
-set_location_assignment PIN_B8 -to GPIO_A_IN[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_A[1]
set_location_assignment PIN_A2 -to GPIO_A[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_A[2]
@@ -211,11 +210,11 @@ set_location_assignment PIN_B6 -to GPIO_A[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_A[10]
set_location_assignment PIN_A6 -to GPIO_A[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_A[11]
-
-#============================================================
-# End of pin assignments by Terasic System Builder
-#============================================================
-
+
+#============================================================
+# End of pin assignments by Terasic System Builder
+#============================================================
+
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
@@ -235,14 +234,15 @@ set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id testbench
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME testbench -section_id testbench
set_global_assignment -name EDA_TEST_BENCH_FILE testbench.v -section_id testbench
-set_global_assignment -name VERILOG_FILE ../verilog/ram.v
-set_global_assignment -name VERILOG_FILE ../verilog/control.v
set_global_assignment -name TEXT_FILE fw.txt
-set_global_assignment -name VERILOG_FILE ../verilog/regfile.v
-set_global_assignment -name VERILOG_FILE ../verilog/library.v
-set_global_assignment -name VERILOG_FILE ../verilog/cpu32.v
set_global_assignment -name VERILOG_FILE ../verilog/alu.v
+set_global_assignment -name VERILOG_FILE ../verilog/control.v
+set_global_assignment -name VERILOG_FILE ../verilog/cpu32.v
+set_global_assignment -name VERILOG_FILE ../verilog/library.v
+set_global_assignment -name VERILOG_FILE ../verilog/ram.v
+set_global_assignment -name VERILOG_FILE ../verilog/regfile.v
set_global_assignment -name VERILOG_FILE ../verilog/uart.v
set_global_assignment -name VERILOG_FILE de0nano.v
set_global_assignment -name SDC_FILE de0nano.sdc
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
-\ No newline at end of file
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
