commit 2170ba059521506316ee9ba7c0bdebe42427b984
parent d11e4b4665ae6c0b6184ff1ec5105ab004d4eac7
Author: Brian Swetland <swetland@frotz.net>
Date: Sun, 29 May 2022 03:13:55 -0700
cleanup: improve PMOD header (J1) presentation in schematic
- tidied up schematic
- added commentary on pin orientation
- renamed RST to RSTn for clarity
- re-exported schematic to PDF
Diffstat:
3 files changed, 82 insertions(+), 72 deletions(-)
diff --git a/export/ethernet-pmod-v2-schematic.pdf b/export/ethernet-pmod-v2-schematic.pdf
Binary files differ.
diff --git a/kicad/ethernet-pmod.kicad_pcb b/kicad/ethernet-pmod.kicad_pcb
@@ -113,6 +113,7 @@
(net 26 "unconnected-(J2-Pad13)")
(net 27 "unconnected-(U1-Pad4)")
(net 28 "Net-(R9-Pad2)")
+ (net 29 "/RSTn")
(footprint "Capacitor_SMD:C_0402_1005Metric" (layer "F.Cu")
(tedit 5B301BBE) (tstamp 00000000-0000-0000-0000-00005c1accdd)
@@ -972,7 +973,7 @@
(pad "7" thru_hole oval locked (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 "/CLKIN") (pinfunction "Pin_7") (pintype "passive") (tstamp e091e263-c616-48ef-a460-465c70218987))
(pad "8" thru_hole oval locked (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 6 "/RST") (pinfunction "Pin_8") (pintype "passive") (tstamp b4833916-7a3e-4498-86fb-ec6d13262ffe))
+ (net 29 "/RSTn") (pinfunction "Pin_8") (pintype "passive") (tstamp b4833916-7a3e-4498-86fb-ec6d13262ffe))
(pad "9" thru_hole oval locked (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 8 "/TXEN") (pinfunction "Pin_9") (pintype "passive") (tstamp 4185c36c-c66e-4dbd-be5d-841e551f4885))
(pad "10" thru_hole oval locked (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
@@ -1479,19 +1480,6 @@
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- (via (at 57.912 63.5) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 6) (tstamp 8af18100-1145-4c6d-8594-5daf284d09e2))
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(segment (start 73.35 65.6375) (end 73.35 66.65) (width 0.2) (layer "F.Cu") (net 7) (tstamp 0b0313f4-7f61-4756-87f6-4d9d9e1885f2))
(segment (start 58.706994 67.4) (end 56.076994 64.77) (width 0.2) (layer "F.Cu") (net 7) (tstamp 332f1768-02f2-44a8-ae88-c3a0127f16e1))
(segment (start 56.076994 64.77) (end 55.3085 64.77) (width 0.2) (layer "F.Cu") (net 7) (tstamp 39d94c13-1700-4874-8fb6-a4abcd5141e6))
@@ -1656,6 +1644,19 @@
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diff --git a/kicad/ethernet-pmod.kicad_sch b/kicad/ethernet-pmod.kicad_sch
@@ -1276,6 +1276,9 @@
(junction (at 184.15 60.96) (diameter 0) (color 0 0 0 0)
(uuid 03caada9-9e22-4e2d-9035-b15433dfbb17)
)
+ (junction (at 52.07 88.9) (diameter 0) (color 0 0 0 0)
+ (uuid 1280a02c-4ed9-41a1-995e-02d7c095a439)
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(junction (at 207.01 90.17) (diameter 0) (color 0 0 0 0)
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(junction (at 168.91 82.55) (diameter 0) (color 0 0 0 0)
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+ (uuid 949f1a9e-213e-4978-813e-552abcd575cf)
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@@ -1354,9 +1357,6 @@
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@@ -1423,10 +1427,6 @@
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(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 9fc27f60-cc4c-4ec0-b3ff-c60a162de325)
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+ (text "Pins are oriented so the 1-6 row is the top row\nwhen looking into the right-angle 2x6 header at\nthe opposite side of the PCB from the RJ45 jack."
+ (at 21.59 64.77 0)
+ (effects (font (size 1.27 1.27)) (justify left bottom))
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- (label "CLKIN" (at 29.21 73.66 0)
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)
@@ -2077,8 +2086,8 @@
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid 970e0f64-111f-41e3-9f5a-fb0d0f6fa101)
)
- (label "TXD0" (at 54.61 81.28 0)
- (effects (font (size 1.27 1.27)) (justify left bottom))
+ (label "TXD0" (at 60.96 81.28 180)
+ (effects (font (size 1.27 1.27)) (justify right bottom))
(uuid 99332785-d9f1-4363-9377-26ddc18e6d2c)
)
(label "TXEN" (at 76.2 85.09 0)
@@ -2097,7 +2106,7 @@
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid b0271cdd-de22-4bf4-8f55-fc137cfbd4ec)
)
- (label "TXD1" (at 29.21 81.28 0)
+ (label "TXD1" (at 27.94 81.28 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid b6135480-ace6-42b2-9c47-856ef57cded1)
)
@@ -2121,12 +2130,12 @@
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid dc2801a1-d539-4721-b31f-fe196b9f13df)
)
- (label "RST" (at 29.21 76.2 0)
+ (label "RSTn" (at 27.94 76.2 0)
(effects (font (size 1.27 1.27)) (justify left bottom))
(uuid e17e6c0e-7e5b-43f0-ad48-0a2760b45b04)
)
- (label "RXD1" (at 54.61 73.66 0)
- (effects (font (size 1.27 1.27)) (justify left bottom))
+ (label "RXD1" (at 60.96 73.66 180)
+ (effects (font (size 1.27 1.27)) (justify right bottom))
(uuid e4e20505-1208-4100-a4aa-676f50844c06)
)
(label "TXN" (at 161.29 85.09 0)
@@ -2591,33 +2600,33 @@
(pin "1" (uuid 9885a113-20b1-4f36-af3f-293b912c9a68))
)
- (symbol (lib_id "power:VCC") (at 30.48 90.17 0) (unit 1)
+ (symbol (lib_id "power:VCC") (at 58.42 88.9 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid 00000000-0000-0000-0000-00005c0f3934)
- (property "Reference" "#PWR0112" (id 0) (at 30.48 93.98 0)
+ (property "Reference" "#PWR0112" (id 0) (at 58.42 92.71 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Value" "VCC" (id 1) (at 30.9118 85.7758 0))
- (property "Footprint" "" (id 2) (at 30.48 90.17 0)
+ (property "Value" "VCC" (id 1) (at 58.8518 84.5058 0))
+ (property "Footprint" "" (id 2) (at 58.42 88.9 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "" (id 3) (at 30.48 90.17 0)
+ (property "Datasheet" "" (id 3) (at 58.42 88.9 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 180e1e54-4369-4276-a9ab-ff77bcb79641))
)
- (symbol (lib_id "power:GND") (at 35.56 95.25 0) (unit 1)
+ (symbol (lib_id "power:GND") (at 34.29 95.25 0) (unit 1)
(in_bom yes) (on_board yes)
(uuid 00000000-0000-0000-0000-00005c0f395f)
- (property "Reference" "#PWR0113" (id 0) (at 35.56 101.6 0)
+ (property "Reference" "#PWR0113" (id 0) (at 34.29 101.6 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Value" "GND" (id 1) (at 35.687 99.6442 0))
- (property "Footprint" "" (id 2) (at 35.56 95.25 0)
+ (property "Value" "GND" (id 1) (at 34.417 99.6442 0))
+ (property "Footprint" "" (id 2) (at 34.29 95.25 0)
(effects (font (size 1.27 1.27)) hide)
)
- (property "Datasheet" "" (id 3) (at 35.56 95.25 0)
+ (property "Datasheet" "" (id 3) (at 34.29 95.25 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid 404b6548-6540-4b6b-9207-34d947483f74))
