os-workshop

commit 39a6b680a90f2605a4fc0e05363e4969b9ba5e53
parent fa5cdd06664c6315326d25558c679d8255323191
Author: Brian Swetland <swetland@frotz.net>
Date:   Thu, 12 May 2022 13:56:48 -0700

riscv.h: typos

Diffstat:
M
hw/inc/hw/riscv.h
 | 
5
+++--

1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/inc/hw/riscv.h b/hw/inc/hw/riscv.h
@@ -86,6 +86,7 @@
 
 #define SSTATUS_XS_SHIFT 15
 #define SSTATUS_FS_SHIFT 13
+#define SSTATUS_SPP_SHIFT 8
 
 // Privilege Levels
 #define PRIV_U 0 // User
@@ -110,7 +111,7 @@
 
 // Exception numbers (xCAUSE) or bits (MEDELEG)
 #define EXCn_INSTR_ADDR_MISALIGN   0
-#define EXCn_INSTR_ACCES_FAULT     1
+#define EXCn_INSTR_ACCESS_FAULT    1
 #define EXCn_ILLEGAL_INSTR         2
 #define EXCn_BREAKPOINT            3
 #define EXCn_LOAD_ADDR_MISALIGN    4
@@ -125,7 +126,7 @@
 #define EXCn_STORE_PAGE_FAULT      15
 
 #define EXCb_INSTR_ADDR_MISALIGN   (1U << 0)
-#define EXCb_INSTR_ACCES_FAULT     (1U << 1)
+#define EXCb_INSTR_ACCESS_FAULT    (1U << 1)
 #define EXCb_ILLEGAL_INSTR         (1U << 2)
 #define EXCb_BREAKPOINT            (1U << 3)
 #define EXCb_LOAD_ADDR_MISALIGN    (1U << 4)