commit c796ec8989294e601546275e43f2b0664b1c9a2c
parent 6e76c2772415b01db88491717914bfc99e8bcf5a
Author: Brian Swetland <swetland@frotz.net>
Date: Wed, 16 Oct 2019 15:54:10 -0700
better disassembly
- recognize a few more aliases
- display jump/branch targets as absolute, in hex
Diffstat:
4 files changed, 30 insertions(+), 12 deletions(-)
diff --git a/instab.txt b/instab.txt
@@ -3,21 +3,27 @@
-------------------------0110111 lui %d, %u
-------------------------0010111 auipc %d, %u
---------------------000001101111 j %j
---------------------000011101111 jal %j
--------------------------1101111 jal %d, %j
+--------------------000001101111 j %J
+--------------------000011101111 jal %J
+-------------------------1101111 jal %d, %J
00000000000000001000000001100111 ret
000000000000-----000000001100111 jr %1
-----------------000000001100111 jr %i(%1)
000000000000-----000000011100111 jalr %1
-----------------000000011100111 jalr %i(%1)
-----------------000-----1100111 jalr %d, %i(%1)
------------------000-----1100011 beq %1, %2, %b
------------------001-----1100011 bne %1, %2, %b
------------------100-----1100011 blt %1, %2, %b
------------------101-----1100011 bge %1, %2, %b
------------------110-----1100011 bltu %1, %2, %b
------------------111-----1100011 bgeu %1, %2, %b
+-------00000-----000-----1100011 beqz %1, %B
+-----------------000-----1100011 beq %1, %2, %B
+-------00000-----001-----1100011 bnez %1, %B
+-----------------001-----1100011 bne %1, %2, %B
+-------00000-----100-----1100011 bltz %1, %B
+------------00000100-----1100011 bgtz %2, %B
+-----------------100-----1100011 blt %1, %2, %B
+------------00000101-----1100011 blez %2, %B
+-------00000-----101-----1100011 bgez %1, %B
+-----------------101-----1100011 bge %1, %2, %B
+-----------------110-----1100011 bltu %1, %2, %B
+-----------------111-----1100011 bgeu %1, %2, %B
-----------------000-----0000011 lb %d, %i(%1)
-----------------001-----0000011 lh %d, %i(%1)
-----------------010-----0000011 lw %d, %i(%1)
@@ -31,7 +37,9 @@
000000000000-----000-----0010011 mv %d, %1
-----------------000-----0010011 addi %d, %1, %i
-----------------010-----0010011 slti %d, %1, %i
+000000000001-----011-----0010011 seqz %d, %1
-----------------011-----0010011 sltiu %d, %1, %i
+111111111111-----100-----0010011 not %d, %1
-----------------100-----0010011 xori %d, %1, %i
-----------------110-----0010011 ori %d, %1, %i
-----------------111-----0010011 andi %d, %1, %i
@@ -39,9 +47,13 @@
0000000----------101-----0010011 srli %d, %1, %x
0100000----------101-----0010011 srai %d, %1, %x
0000000----------000-----0110011 add %d, %1, %2
+0100000-----00000000-----0110011 neg %d, %2
0100000----------000-----0110011 sub %d, %1, %2
0000000----------001-----0110011 sll %d, %1, %2
+000000000000-----010-----0110011 sltz %d, %1
+0000000-----00000010-----0110011 sgtz %d, %2
0000000----------010-----0110011 slt %d, %1, %2
+0000000-----00000011-----0110011 snez %d, %2
0000000----------011-----0110011 sltu %d, %1, %2
0000000----------100-----0110011 xor %d, %1, %2
0000000----------101-----0110011 srl %d, %1, %2
diff --git a/riscv.h b/riscv.h
@@ -40,4 +40,4 @@ static inline uint32_t get_ij(uint32_t ins) {
#define OP_JALR 0b1100111
#define OP_B
-void rvdis(uint32_t ins, char *out);
+void rvdis(uint32_t pc, uint32_t ins, char *out);
diff --git a/rvdis.c b/rvdis.c
@@ -15,6 +15,10 @@ static char *append_i32(char *buf, int32_t n) {
return buf + sprintf(buf, "%d", n);
}
+static char *append_u32(char *buf, int32_t n) {
+ return buf + sprintf(buf, "0x%x", n);
+}
+
static const char* regname[32] = {
#if 0
"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
@@ -39,7 +43,7 @@ static rvins_t instab[] = {
#include "gen/instab.h"
};
-void rvdis(uint32_t ins, char *out) {
+void rvdis(uint32_t pc, uint32_t ins, char *out) {
unsigned n = 0;
while ((ins & instab[n].mask) != instab[n].bits) n++;
const char* fmt = instab[n].fmt;
@@ -55,7 +59,9 @@ void rvdis(uint32_t ins, char *out) {
case 'd': out = append_str(out, regname[get_rd(ins)]); break;
case 'i': out = append_i32(out, get_ii(ins)); break;
case 'j': out = append_i32(out, get_ij(ins)); break;
+ case 'J': out = append_u32(out, pc + get_ij(ins)); break;
case 'b': out = append_i32(out, get_ib(ins)); break;
+ case 'B': out = append_u32(out, pc + (2 * get_ib(ins))); break;
case 's': out = append_i32(out, get_is(ins)); break;
case 'u': out = append_i32(out, get_iu(ins)); break;
case 'x': out = append_i32(out, get_r2(ins)); break;
diff --git a/rvsim.c b/rvsim.c
@@ -55,7 +55,7 @@ void rvsim(rvstate* s) {
pc = s->pc;
while (pc < 64) {
ins = rd32(pc);
- rvdis(ins, dis);
+ rvdis(pc, ins, dis);
printf("%08x: %08x %s\n", pc, ins, dis);
pc += 4;
}
