zynq-sandbox

commit 3af7ccf4e3afd729225d9d5b0f1234c602d0dbcf
parent df2453b0daf06aa5e470309269315876566e1e31
Author: Brian Swetland <swetland@frotz.net>
Date:   Wed, 30 Jul 2014 01:32:48 -0700

axi-registers: fix some issues verilator didn't care about but vivado did

Diffstat:
M
hdl/axi_registers.sv
 | 
4
++--

1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hdl/axi_registers.sv b/hdl/axi_registers.sv
@@ -36,8 +36,8 @@ module axi_registers (
 	output reg [R_ADDR_WIDTH-1:0]o_rreg = 0,
 	output reg [R_ADDR_WIDTH-1:0]o_wreg = 0,
 	input wire [31:0]i_rdata,
-	output reg [31:0]o_wdata = 0,
-	output wire o_rd,
+	output wire [31:0]o_wdata,
+	output reg o_rd = 0,
 	output wire o_wr
 	);