gateware

commit 601cbbee3cad73d789ec3d28fe2f5cd8f97c3e8c
parent fd59b73302bce67b12efa3b61383f6070087887c
Author: Brian Swetland <swetland@frotz.net>
Date:   Thu,  6 Feb 2020 15:16:27 -0800

cleanup: s/display_timing/display-timing/

Diffstat:
R
hdl/display/display_timing.sv -> hdl/display/display-timing.sv
 | 
0

M
project/colorlight-sdram.def
 | 
2
+-
M
project/colorlight.def
 | 
2
+-
M
project/icebreaker-hdmi111.def
 | 
2
+-
M
project/test-display.def
 | 
2
+-
M
project/ulx3s-sdram.def
 | 
2
+-
M
project/vga40x30-arty-a7-hdmi111.def
 | 
2
+-

7 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hdl/display/display_timing.sv b/hdl/display/display-timing.sv
diff --git a/project/colorlight-sdram.def b/project/colorlight-sdram.def
@@ -3,7 +3,7 @@ PROJECT_TYPE := nextpnr-ecp5
 PROJECT_SRCS := hdl/colorlight-sdram.sv hdl/colorlight.lpf
 PROJECT_SRCS += hdl/lattice/ecp5_pll_25_125_250.v
 PROJECT_SRCS += hdl/lattice/ecp5_pll_25_100.v
-PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display-timing.sv
 PROJECT_SRCS += hdl/sdram/memtest1.sv
 PROJECT_SRCS += hdl/sdram/sdram.sv hdl/sdram/sdram_glue_ecp5.sv
 PROJECT_SRCS += hdl/xorshift.sv
diff --git a/project/colorlight.def b/project/colorlight.def
@@ -5,6 +5,6 @@ PROJECT_SRCS += hdl/lattice/ecp5_pll_25_125_250.v
 PROJECT_SRCS += hdl/ethernet/eth_rgmii_rx.sv hdl/ethernet/eth_rgmii_rx_glue_ecp5.sv
 PROJECT_SRCS += hdl/ethernet/eth_rgmii_tx.sv hdl/ethernet/eth_rgmii_tx_glue_ecp5.sv
 PROJECT_SRCS += hdl/ethernet/eth_crc32_8.sv
-PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display-timing.sv
 
 PROJECT_NEXTPNR_OPTS := --25k --package CABGA381 --speed 6
diff --git a/project/icebreaker-hdmi111.def b/project/icebreaker-hdmi111.def
@@ -4,6 +4,6 @@ PROJECT_TYPE := nextpnr-ice40
 PROJECT_SRCS := hdl/icebreaker_hdmi111.sv hdl/board_icebreaker_hdmi111.pcf
 PROJECT_SRCS += hdl/lattice/pll_12_25.v
 PROJECT_SRCS += hdl/uart_debug_ifc.sv hdl/uart_rx.sv hdl/crc8_serial.sv
-PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv 
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display-timing.sv 
 
 PROJECT_NEXTPNR_OPTS := --package sg48 --up5k 
diff --git a/project/test-display.def b/project/test-display.def
@@ -2,6 +2,6 @@
 PROJECT_TYPE := verilator-sim
 
 PROJECT_SRCS := hdl/display/testbench.sv
-PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display-timing.sv
 
 PROJECT_VOPTS := -CFLAGS -DVGA
diff --git a/project/ulx3s-sdram.def b/project/ulx3s-sdram.def
@@ -6,7 +6,7 @@ PROJECT_SRCS += hdl/lattice/ecp5_pll_25_125_250.v
 PROJECT_SRCS += hdl/sdram/memtest1.sv
 PROJECT_SRCS += hdl/sdram/sdram.sv hdl/sdram/sdram_glue_ecp5.sv
 PROJECT_SRCS += hdl/xorshift.sv
-PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display-timing.sv
 PROJECT_SRCS += hdl/display/dvi-encoder.sv hdl/display/dvi-backend.sv
 
 PROJECT_NEXTPNR_OPTS := --85k --package CABGA381 --speed 6
diff --git a/project/vga40x30-arty-a7-hdmi111.def b/project/vga40x30-arty-a7-hdmi111.def
@@ -4,7 +4,7 @@ PROJECT_TYPE := vivado
 PROJECT_SRCS := hdl/arty_a7_hdmi111.sv hdl/arty_a7_35.xdc
 PROJECT_SRCS += hdl/xilinx/mmcm_100m_25m.sv
 #PROJECT_SRCS += hdl/vga/vga40x30x2.sv hdl/vga/vga.sv hdl/vga/videoram.sv hdl/vga/chardata.sv 
-PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display-timing.sv
 
 PROJECT_VIVADO_OPTS :=
 PROJECT_PART := xc7a35ticsg324-1L