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commit abdb1c0a09f1fec0b3668e2c9fe4ebc78ccde162
parent a7f51b26a91827349c95fded8d890c155e617737
Author: Brian Swetland <swetland@frotz.net>
Date:   Mon, 27 Jan 2020 11:39:46 -0800

cpu16: move testbench into cpu16 subdir

Diffstat:
Rhdl/testbench.sv -> hdl/cpu16/testbench.sv | 0
Mproject/cpu16.def | 2+-
2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/hdl/testbench.sv b/hdl/cpu16/testbench.sv diff --git a/project/cpu16.def b/project/cpu16.def @@ -1,5 +1,5 @@ PROJECT_TYPE := verilator-sim -PROJECT_SRCS := hdl/testbench.sv hdl/simram.sv +PROJECT_SRCS := hdl/cpu16/testbench.sv hdl/simram.sv PROJECT_SRCS += hdl/cpu16/cpu16.sv hdl/cpu16/cpu16_regs.sv hdl/cpu16/cpu16_alu.sv