gateware

commit 57b54dad818fa1857a05658114f1195e1c882720
parent 6ce5973710ecb1149c9bc78c8e48ce1d1ba1ce39
Author: Brian Swetland <swetland@frotz.net>
Date:   Wed, 22 Jan 2020 16:06:22 -0800

cpu16: migrate most cpu16 stuff to hdl/cpu16

Diffstat:
R
README -> hdl/cpu16/README
 | 
0

R
hdl/cpu16.sv -> hdl/cpu16/cpu16.sv
 | 
0

R
hdl/cpu16_alu.sv -> hdl/cpu16/cpu16_alu.sv
 | 
0

R
hdl/cpu16_regs.sv -> hdl/cpu16/cpu16_regs.sv
 | 
0

R
docs/isa16v5.txt -> hdl/cpu16/isa16v5.txt
 | 
0

M
project/cpu16-icebreaker-hdmi111.def
 | 
2
+-
M
project/cpu16-icebreaker-vga444.def
 | 
2
+-
M
project/cpu16-lattice-evb.def
 | 
2
+-
M
project/cpu16.def
 | 
2
+-
M
project/vga40x30-arty-a7-hdmi111.def
 | 
3
++-

10 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/README b/hdl/cpu16/README
diff --git a/hdl/cpu16.sv b/hdl/cpu16/cpu16.sv
diff --git a/hdl/cpu16_alu.sv b/hdl/cpu16/cpu16_alu.sv
diff --git a/hdl/cpu16_regs.sv b/hdl/cpu16/cpu16_regs.sv
diff --git a/docs/isa16v5.txt b/hdl/cpu16/isa16v5.txt
diff --git a/project/cpu16-icebreaker-hdmi111.def b/project/cpu16-icebreaker-hdmi111.def
@@ -6,6 +6,6 @@ PROJECT_SRCS += hdl/system_cpu16_vga40x30.v hdl/lattice/pll_12_25.v
 #PROJECT_SRCS += hdl/spi_debug_ifc.v
 PROJECT_SRCS += hdl/uart_debug_ifc.sv hdl/uart_rx.sv hdl/crc8_serial.sv
 PROJECT_SRCS += hdl/vga/vga40x30x2.sv hdl/vga/vga.sv hdl/vga/videoram.sv hdl/vga/chardata.sv
-PROJECT_SRCS += hdl/cpu16.sv hdl/cpu16_regs.sv hdl/cpu16_alu.sv
+PROJECT_SRCS += hdl/cpu16/cpu16.sv hdl/cpu16/cpu16_regs.sv hdl/cpu16/cpu16_alu.sv
 
 PROJECT_NEXTPNR_OPTS := --package sg48 --up5k 
diff --git a/project/cpu16-icebreaker-vga444.def b/project/cpu16-icebreaker-vga444.def
@@ -6,6 +6,6 @@ PROJECT_SRCS += hdl/system_cpu16_vga40x30.v hdl/lattice/pll_12_25.v
 #PROJECT_SRCS += hdl/spi_debug_ifc.v
 PROJECT_SRCS += hdl/uart_debug_ifc.sv hdl/uart_rx.sv hdl/crc8_serial.sv
 PROJECT_SRCS += hdl/vga/vga40x30x2.sv hdl/vga/vga.sv hdl/vga/videoram.sv hdl/vga/chardata.sv
-PROJECT_SRCS += hdl/cpu16.sv hdl/cpu16_regs.sv hdl/cpu16_alu.sv
+PROJECT_SRCS += hdl/cpu16/cpu16.sv hdl/cpu16/cpu16_regs.sv hdl/cpu16/cpu16_alu.sv
 
 PROJECT_NEXTPNR_OPTS := --package sg48 --up5k 
diff --git a/project/cpu16-lattice-evb.def b/project/cpu16-lattice-evb.def
@@ -6,6 +6,6 @@ PROJECT_SRCS += hdl/system_cpu16_vga40x30.v hdl/lattice/pll_12_25.v
 #PROJECT_SRCS += hdl/spi_debug_ifc.v
 PROJECT_SRCS += hdl/uart_debug_ifc.sv hdl/uart_rx.sv hdl/crc8_serial.sv
 PROJECT_SRCS += hdl/vga/vga40x30x2.sv hdl/vga/vga.sv hdl/vga/videoram.sv hdl/vga/chardata.sv
-PROJECT_SRCS += hdl/cpu16.sv hdl/cpu16_regs.sv hdl/cpu16_alu.sv
+PROJECT_SRCS += hdl/cpu16/cpu16.sv hdl/cpu16/cpu16_regs.sv hdl/cpu16/cpu16_alu.sv
 
 PROJECT_NEXTPNR_OPTS := --package sg48 --up5k 
diff --git a/project/cpu16.def b/project/cpu16.def
@@ -2,4 +2,4 @@
 PROJECT_TYPE := verilator-sim
 
 PROJECT_SRCS := hdl/testbench.sv hdl/simram.sv
-PROJECT_SRCS += hdl/cpu16.sv hdl/cpu16_regs.sv hdl/cpu16_alu.sv
+PROJECT_SRCS += hdl/cpu16/cpu16.sv hdl/cpu16/cpu16_regs.sv hdl/cpu16/cpu16_alu.sv
diff --git a/project/vga40x30-arty-a7-hdmi111.def b/project/vga40x30-arty-a7-hdmi111.def
@@ -3,7 +3,8 @@ PROJECT_TYPE := vivado
 
 PROJECT_SRCS := hdl/arty_a7_hdmi111.sv hdl/arty_a7_35.xdc
 PROJECT_SRCS += hdl/xilinx/mmcm_100m_25m.sv
-PROJECT_SRCS += hdl/vga/vga40x30x2.sv hdl/vga/vga.sv hdl/vga/videoram.sv hdl/vga/chardata.sv
+#PROJECT_SRCS += hdl/vga/vga40x30x2.sv hdl/vga/vga.sv hdl/vga/videoram.sv hdl/vga/chardata.sv 
+PROJECT_SRCS += hdl/display/display.sv hdl/display/display_timing.sv
 
 PROJECT_VIVADO_OPTS :=
 PROJECT_PART := xc7a35ticsg324-1L